Summer 2022 Design Verification Co-Op/ Intern - (118082)

Location: Austin, Texas, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

THE ROLE:

Excited about exploring leading technology GPU design? Do you enjoy problem-solving unique implementation and design challenges? Then we have the right role for you!

The DV Co-op/Intern is responsible for all aspects of verification on next generation graphics processors, including testbenches, test libraries, software modeling, Verilog modeling, test development, regressions, and infrastructure development.

 

THE PERSON:

We are seeking an analytical thinker with problem-solving skills and excellent attention to detail. The ideal candidate: enjoys ambitious work in a multi-project team environment using state-of-the-art tools and technology, is a self-starter who is able to work independently to complete tasks on schedule and demonstrates creativity with "out-of-the-box" solutions and high initiative to solve unassigned but project impacting issues.

 

KEY RESPONSIBILITIES:

  • Work with Verification Leads and reads documentation to understand features to be verified
  • Review/Modify or create new test plans for specific features
  • Create/Modify various testbench components in UVM. Write Tests in UVM or C as needed. Do functional coverage
  • Debug test failures to determine defect type (modeling, design, or verification test); solve modeling issues and work with the DV team to correct defects
  • Additional responsibilities may include implementing script/tool for Triage Automation

 

PREFERRED EXPERIENCE:

  • Good Knowledge of System Verilog, UVM
  • Good Knowledge of debug Verilog/System Verilog RTL code using simulation tools
  • Proficiency in C/C++ is a plus
  • Working knowledge of both Linux and Windows environments
  • Understanding of digital electronics and ASIC design flow (plus)
  • Understanding of the Compute Graphics is not required, but is a plus

 

ACADEMIC CREDENTIALS:

  • BS, MS (preferred) or PhD in Electrical or Computer Engineering or related

 

LOCATION:

Austin, TX

 

AMD is a government contractor and subcontractor. As required by Executive Order, our US employees are required to be fully vaccinated against COVID-19 regardless of the employee’s work location or work arrangement (e.g., telework, remote work, etc.), subject to such exceptions as required by law. If selected, you will be required to be vaccinated against COVID-19 and submit documentation of proof of vaccination by January 4, 2022. AMD will provide additional information regarding what information or documentation will be needed and how you can request an exception from this requirement if you have a need for a religious and/or medical accommodation.



Requisition Number: 118082 
Country: United States State: Texas City: Austin 
Job Function: Student/ Intern/ Temp
  

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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