DRAM Controller IP Functional Verification Engineer - 106024

Location: Austin, Texas, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

DRAM Controller IP Functional Verification Engineer

The Role:

As a Functional Verification Engineer in the UMC CSSE Verification team, you are part of a dedicated team whose work has enabled AMD to put multiple SoCs to market in any given year. The UMC CSSE (Client Server System IP Engineering) is part of every new AMD product being developed across Client, Server, and Semi-Custom markets. The UMC stands for Unified Memory Controller but a better name for the RTL we verify is the DRAM Controller. We are seeking a senior level engineer to join this team to innovate and improve our testbench, integration timelines, and help verify our growing product portfolio. In this role, you will analyze the health of UMC RTL and features for a given Variant and milestone we are delivering. You may also be asked to scope new UMC features and existing Verification stimulus/checks in identified problematic delivering areas; setting priorities and game plan to accomplish the work in a predicted time plan. We have a competitive benefits package and an award-winning culture. Are you ready to be a part of this outstanding team? If so, then join us!

The Person:

An experienced functional design verification engineer with exceptional programming skills, DRAM experience, and knowledge of all aspects of design verification cycles. A global mentality, excellent communication, and analytical thinking skills are keys to being successful on this team.

Key Responsibilities:

  • Provide technical expertise for developing the functional verification strategy of AMD’s next generation Unified Memory Controller (also known as DRAM Controller IP)
  • Understand the architecture and area ownerships of the DRAM Controller IP. Know the next deliverables and ownership for verification track and make recommendations on what adjustment to take, so we can deliver as many features as promised each milestone.
  • Review stats as variant driver and create summary weekly.
  • Integrate UMC CSSE tag to SoC. (some will be push model and some pull). Improve integration times.
  • Maintain and enhance existing verification infrastructure.
  • Developing and reviewing test plans, functional coverage points, monitors, scoreboards, sequencers, and sequences, which utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved.

Preferred Experience:

  • Functional verification and integration experience
  • Exposure to DRAM controllers or DRAM technology
  • UVM and strong Object Oriented programming and debug skills
  • Significant experience with Verilog and System Verilog, logic simulation and integration
  • Knowledge of computer Architecture (ecc, aes, parity, replay)
  • Proven technical expertise in functional verification of complex designs including test planning, test bench development, stimulus generation, checking and functional coverage

Academic Credentials:

MS in Computer Engineering or Electrical Engineering preferred

Location:

Austin, TX or Boxborough, MA

 

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Requisition Number: 106024 
Country: United States State: Texas City: Austin 
Job Function: Design
  

 

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