Display IP Design Engineer-162883

Location: Austin, Texas, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

Senior Designer for Display IP Integration


The Display Controller team within the Radeon Technologies Group(RTG) is looking for an individual to participate in the Display IP integration into SOC programs within AMD. 


Position Overview:

 The Display IP is one of the foundational IP's within AMD and is incorporated in all AMD SOC's which feature direct connectivity to a display device through Display Port, HDMI or USB-C connectors.  Beyond the output encoding, the Display IP plays a significant role in the pixel processing and system power reduction strategies within the SOC.  


As a member of the IP team, the candidate would be responsible for identifying and executing sustainable technical solutions to enable integration of the Display IP design and DV collateral into AMD SOC environments.  This position would require the individual to draw upon proven industry design and/or design verification experiences to ensure successful program execution.  The Display Architecture, Design and DV teams are based in Markham, Canada(just North of Toronto) and interacts daily with the Major Design centers across the globe. 



Key Responsibilities:

  • Understand the functional and performance requirements of the Display IP within an APU and dGPU SOC
  • Drive IP and SOC design infra decisions to ensure consumption within the context of the SOC.
  • Work closely with architects and design leads to understand integration impact to the IP design.
  • Scope requirements and resources to meet project schedules
  • Compose test and coverage plan to ensure functional completeness in an SOC environment
  • Provide guidance and/or act as a liaison between IP and SOC design teams for synthesis and physical layout issues
  • Work with SOC team members to meet interface, timing, power, CDC & LINT goals for the program.
  • Work with SOC teams to debug test and/or environment issues and failing test cases as required.
  • Provide hands on leadership of a small team of Engineers as required to meet program development goals
  • Codeline management
  • Signoff IP quality for delivery into SOC
  • Effectively communicate with multi-disciplined teams located across the globe
  • Gather, attend and present into technical status meetings on a weekly/bi-weekly basis

Preferred Experience :

  • Proven design and/or verification experience on large ASIC development projects
  • Strong background coding in Verilog & System Verilog
  • C/C++/OO coding is an asset
  • Experience working with industry standard synthesis tools, flows and timing closure(Formality, CDC&Linting tools, Design Compiler/FX etc)
  • Experience working with Cadence NCSIM, Synopsys VCS or equivalent
  • Experience working with UVM, OVM or equivalent is an asset
  • Experience with scripting languages, Ruby/Python/Tcl/BASH/etc.
  • Strong analytical skills and attention to detail
  • Excellent written and communication skills
  • Experience with display/display related technologies is an asset
  • Understanding of the IP integration and interactions within an SOC is an asset
  • Deep understanding of computer architecture
  • Must be a self-starter and able to independently drive cross team tasks to completion
  • Demonstrates the ability to debug issues and quickly identify viable solutions
  • Team player with proven leadership skills



Academic Credentials: 

  • Bachelor of Science Degree in Electrical Engineering, Computer Science, or Computer Engineering.
  • #LI-DC3
  • #displayip

Requisition Number: 162883 
Country: United States State: Texas City: Austin 
Job Function: Design

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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