MTS Silicon Design Engineer- 101582

Location: Austin, Texas, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Silicon RTL Design Engineer

The role:

An RTL Design Engineering role in our System Management Unit (SMU) IP team, where a large number of individual embedded micro-processor (MP) subsystems and associated hardware accelerators vital to improve subsystems performance and functionality are designed and verified. These subsystem IPs provide high performance functions to System on Chip (SoC) products across all AMD business units such as client computers, servers, discrete graphics, and gaming. Our design engineers will work on block level RTL design and/or subsystem level integration for a variety of embedded MP subsystems. Your expertise will impact security policy management, cryptography, data compression, high throughput DMA, power management, and many other subsystem applications.

The person:

A talented hardware RTL design engineer with strong records of technical ownership and execution to drive block level IP and/or MP subsystems design and verification assignments to completion. A forward-thinking engineer who tends to optimize/improve the workflow, anticipate/analyze/resolve technical issues, enjoy a competitive pace while empowering and mentoring team members. A strong written and verbal communicator with strong problem solving and attention to detail skills along with professional interpersonal communication capability.

Key responsibilities:

  • Develop and maintain block level RTL IP and MP subsystems’ feature spec, micro-architecture, synthesizable RTL design methodology and infrastructure
  • Develop and debug RTL designs using C-DPI directed test methodology, and/or using verification team’s testbenches and tests, and achieve design feature closure (feature spec vs. coverage metrics)
  • Triage regressions, debug specific simulations, analyze coverage, and work/resolve technical issues with design, verification, and other teams for design feature and design rule closures (linting, timing, DFT, DFP and other rules)
  • Participate in verification testbench and test plan specification, influence testbench architecture development (design for verification aspect), review and improve feature and coverage test plans
  • Debug and resolve integration issues with SoC Integration, SoC DV and post-silicon validation teams

Preferred experience:

  • BSc with a minimum of 5 years of relevant experience; or MSc with a minimum of 3 years; or PhD in a directly related research area and a minimum of 1 equivalent year
  • Proven understanding of CPU and MP subsystem architecture, datapath accelerator RTL micro-architecture, as well as FPGA based simulation or emulation methodology
  • Proficient in Verilog, System Verilog (an extra asset), and scripting (using Tcl, Ruby, Perl, Python and Makefile)
  • Excellent knowledge about state-of-art RTL design and verification methodology and best practices, and C-DPI
  • Excellent understanding of standard bus/interface protocols (i.e. AXI, AHB, AMBA)
  • Proven experience with ASIC design tools: synthesis, linting, simulation, debugging, power aware simulation, etc.

Academic credentials:

  • Bachelor's Degree or Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science, or possibly a related field
  • Master's Degree preferred

Location: 

Austin, Texas

Markham, Ontario

 



Requisition Number: 101582 
Country: United States State: Texas City: Austin 
Job Function: Design
  

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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