Standard Cell Library Engineer - 101801

Location: Austin, Texas, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Our Team

Our team is responsible for delivering PDKs, standard cell libraries, and other foundation IP that are used in all products that AMD designs. We are exposed to bleeding edge technologies that few in the company will ever hear off. We play a major role in shaping AMD’s roadmap and future products. Join Us!

Job Purpose

The role of the FTO Enablement Engineer (Stdcell) is geared towards developing required IP EDA views, importing 3rd Party IP products and qualifying them with AMD POR design flows. Be a part of a leading edge design team, including cell design and electrical verification. On-site interface with 3rd party providers of IPs is also required.

Key Responsibilities May Include

  • Standard cell circuit evaluation for low-power or high-speed application
  • Crafting a test and characterization plan from documentation provided by designers
  • Standard cell library characterization and build as well as quality assurance
  • Library maintenance, including all kinds of representative formats for all design flows and tools
  • Standard cell program management and vendor interface

Skills And Experience Requirements

  • Provides technical mentorship and training to less experienced engineers and technicians in the planning, test, & debug of the PMM portion.
  • Circuit experience at technologies 7nm and below.
  • Proficient in Verilog HDL, Synopsys liberty library, spice simulation, and ASIC design flow
  • System Verilog experience a plus
  • Proficient in script programming, such as, TCL, Perl or C-shell languages
  • Well versed in Cadence design flow, including composers
  • Proficient in UNIX (Linux) platforms
  • Proven experience working remotely and independently as part of a satellite team
  • Good communication skills
  • Understanding of Physical Verification Flows including SAPR is an asset
  • Experience in stdcell library validation, integration, and user support

Education

BS Computer Science/Electrical/Electronics/Computer Engineering or equivalent experience

 

Location

 

Austin, TX

 

#LI-TW1



Requisition Number: 101801 
Country: United States State: Texas City: Austin 
Job Function: Design
  

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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