Memory FW Design Engineer

Location: Boxborough, Massachusetts, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

The Role:

This is a great opportunity for engineers who have a passion for hands-on learning and problem solving while applying their skill set in a lab validation role for validating DDR I/O interfaces. The goal is to get stuff working in the lab. In addition to this, the candidate is expected to participate in verifying DDR memory bring up sequences in a pre-silicon RTL/mixed signal environment.

 

The Person:
The ideal candidate is motivated by participating in a broad range of AMD’s business. The candidate will enjoy working with technical people across a variety of AMD design and test teams, as well as IP vendor and possibly AMD customer teams, and thinks of himself/herself as a problem solver.

 

Responsibilities:

  • Provide systems engineering and post-silicon support for memory interface IP
  • New products bring-up support from first silicon in the lab through initial production
  • Triage observations from silicon validation, and help debug issues with ATE, Platform, Firmware, and characterization/compliance teams
  • Guide and support in silicon design, process, and integration flows for SerDes and Memory Interface IP
  • Pre-Silicon engagement with internal and external PHY design teams, Platform, ATE, IP design, and Firmware teams.

 

 

Preferred experience & skill sets:

  • Pre-Silicon design verification of memory interface
  • Should have taken computer architecture, digital system design and microelectronics courses in school
  • Knowledge of Linux OS, Windows OS
  • Working experience with oscilloscopes, logic, or protocol analyzer equipment
  • System/platform level debug and root cause isolation
  • knowledge of IO design, Equalization circuits, PLLs, DLLs, Comparators, Reference voltage generators and basic analog building blocks
  • Excellent knowledge of Python Scripting to mine data from log files and good knowledge of C/C++ language to understand firmware code flow. 
  • Good laboratory debug skills and a passion to get to the root of complex problems by collaborating with design and firmware engineering teams
  • Experience in Post Silicon electrical/functional validation of DDR and LPDDR Memory interfaces
  • Understanding of Jedec standards for DDR technologies such as DDR4/5 and LPDDR4/5
  • Understanding of Memory training and bring up sequences and ability to interpret debug logs generated during memory bring up
  • Basic knowledge of IO design

 

 

Education:
Bachelors’ degree or master’s degree in Electrical or Computer Engineering or Computer Science.

 

Location:

Austin, TX

 

#LI-DP1

 

 



Requisition Number: 121461 
Country: United States State: Massachusetts City: Boxborough 
Job Function: Design
  

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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