Sr. Packaging Engineer - 80830

Location: Santa Clara, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

Sr. Packaging Engineer

The Role:

Are you interested in a role that offers the opportunity to show off your outstanding engineering, creative problem-solving and communication skills? Be a part of our Packaging Engineering team & help turn "possibility" into "reality" every day. It’s a rare opportunity to work on innovations that will redefine an industry for years to come. AMD is bolder than ever, focused and energized - you can make a career move that matters! We have competitive benefit packages and award-wining culture. Join us!

The Person:

The ideal candidate has excellent communication and organizational skills. You are a team player and must be able to work well with others. As a member of this team, you will interact with Assembly houses and substrate vendors to achieve the most cost efficient design, meeting design and yield requirements. You will mentor junior colleagues to enhance layout practices to create best in class package design.

Key Responsibilities:

  • Conduct feasibilities study, together with SI/PI teams, silicon and PCB design to arrive at a design that will meet the design objective with regards to performance, cost and quality.
  • Support initial package design activities to enable new test vehicles, package layer stackup selection, Signal/power/ground layer assignment and ensure critical package level performance.
  • Work cross-functionally to understand trade-offs, constraints, and for optimizing silicon floor plan, bump and package pin out.
  • Define design process and methodologies to improve layout efficiency.
  • Deliver a substrate layout for AMD products, probe cards and test vehicles on schedule and meet the design objectives.
  • Create, conduct, and analyze Design of Experiments (DOE) for development and sustaining activities
  • Solve technical issues on package reliability, materials and assembly process by working closely with assembly and material suppliers.

Preferred Experience:

  • Proven experience on Processor Package Design and/or ASIC Chip Package Design
  • Knowledge on using CAD tools such as Cadence APD, SiP, AUTOCAD.
  • Experience with SOC packaging design, assembly rules and reliability analysis/requirements.
  • Experience dealing with assembly and substrate subcontractors.
  • Understanding of semiconductor package reliability principles
  • Knowledge of I. C. package types used in the semiconductor industry
  • Knowledge on Perl Script Programming

Academic Credentials:

B.S or M.S. in Mechanical Engineering, Electrical Engineering, Computer Engineering, or Engineering Science


Austin, TX



Requisition Number: 80830 
Country: United States State: California City: Santa Clara 
Job Function: Packaging Engineering


AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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