Design Engineer - SMU - 81625

Location: Austin, Texas, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Design Verification Engineer - SMU

The role:

IP Design Verification Engineering in our System Management Unit (SMU) IP team: The dual focus is both design verification and logic design of various embedded micro-processor subsystems and the associated hardware accelerators vital to improve performance and functionality. These IP subsystems provide high performance functions to Systems on Chip (SoCs). Our verification engineers improve the security and architecture of embedded MP subsystems across many business units from the latest workstations and servers to gaming. Your expertise will affect security policy management, cryptography, data compression, high throughput DMA, and more! Exciting work because we deliver technology to roadmaps across AMD: client, graphics, server, and embedded. Make a difference with power efficiency and power management.

 

The person: 

A strong communicator who understands the importance of developing reusable code over multiple product generations and brings an ability to independently drive tasks to completion. A forward-thinking engineer who enjoys a competitive pace while empowering and mentoring team members working hands on to resolve technical issues. Show us your problem solving skills and attention to details along with professional interpersonal communication skills.

 

Key Responsibilities: 

  • Develop and maintain subsystem verification architecture, testbench, and test methodology
  • Develop and execute subsystem and block level test plans and develop testbenches using UVM randomized test methodology and C-DPI directed test methodology - Use object-oriented programming to make major changes to test benches
  • Participate in subsystem specification, influence IP micro-architecture development (design for verification aspect), design and execute reusable test methodology
  • Problem solve with SoC integration and SoC DV teams

 

Preferred Experience: 

  • BS with a minimum of 5 years of experience; or MS with a minimum of 3 yrs; or PhD with a minimum of 1 yr; Bottom line: Significant career experience on a subsystem design or verification product team
  • Proficient in System Verilog, object oriented programming, and scripting
  • Excellent knowledge about methodology: best verification practices, UVM, and C-DPI
  • Excellent understanding of standard bus/interface protocols (i.e. AXI, AHB, AMBA)
  • Proven experience with ASIC verification tools, simulation, linting, power aware simulation, etc.
  • Proven understanding of microprocessor subsystem architecture and of FPGA based simulation or emulation methodology

 

Academic Credentials: 

  • Bachelor’s degree with major in Electrical Engineering, Computer Science, or another relevant subject
  • Master’s Degree preferred

 

Location: 

Austin, Texas

 

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Requisition Number: 81625 
Country: United States State: Texas City: Austin 
Job Function: Design
  

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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