DFT - RTL Lead Engineer

Location: Bangalore, Karnataka, IN

Company: Advanced Micro Devices

Apply now

Apply for Job

We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team.
AMD together we advance_

 

As a member of the Server SoC DFT Team, the successful candidate will own the DFT micro-architecture and RTL implementation using Verilog/System Verilog for the next gen of AMD Server SoCs.

 

Responsibilities include:

Working closely with the DFT Architecture and the various IP Design teams to align on the DFT requirements and successfully implementing the DFT RTL at the SoC level

Working closely with the ATPG team for coverage support, with the DV team on helping debugging and root-causing the test failures and with the PD team on DFT timing closure.

 

Requirements:

Experience in DFT architecture for complex chips

Experience in RTL development using Verilog/System Verilog having worked on RTL for IP and SoC integration

Proficient in doing basic unit-level verification using simulations.

Experience with RTL quality check tools/methodologies such as Spyglass, CDC, Lint is required.

Must have experience with integration of various IPs into complex SOCs.

Exposure to Static timing analysis & Timing closure is required.

Any prior experience with microprocessor designs is a plus.

Excellent hands-on debug skills and scripting skills are critical.

Must have good communication skills and the ability to work in a worldwide team environment.

Knowledge & experience of low power concepts, clock gating, power gating is a plus

Experience with post-silicon bring up is a plus

 

Qualifications:

B.E/B.Tech/M.E/M.Tech in Electrical/Electronics Engineering

4+  years experience in RTL design

 

#LI-NS1



Requisition Number: 173047 
Country/Region/Location: India State/Province: Karnataka City: Bangalore 
Job Function: 
Design  

Apply now

Apply for Job