SOC Design Manager

Location: Bangalore, Karnataka, IN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

THE ROLE:

  • Be part of team involve SOC level design and integration experience. Integration of IP, SOC level fabric, voltage and clock crossings, power intent design and static verification, clocks, resets, fuses
  • Execute on RTL Design and Coding for various sections of the SoC and related logic
  • Work with a team of hardware and software engineers to Define the High-Level Architecture 
     

THE PERSON:

  • Strong self-driving ability
  • Should have excellent communication skills (both written and oral)
  • Strong problem-solving skills

 

KEY RESPONSIBILITIES:

  • Participate in the Definition of Micro Architecture of Next Generation High Performance Processor Cores
  • Contribute to Design Verification, Synthesis, Power Reduction, Timing Convergence & Floorplan efforts 

 

PREFERRED EXPERIENCE:

  • Experience must include a strong level of experience in Verilog RTL Development with industry tools in a CPU, SOC or ASIC environment 
  • Background in other aspects of ASIC implementation, especially with Synthesis flow and Static Timing Analysis is a plus 
  • Expertise with RTL development, SOC Integration, SOC architecture understanding, System bus protocol understanding (e.g. AXI, PCIe etc)
  • Expertise in Power Aware synthesis, RTL development, SOC integration
  • Experience closing block/tile timing closure in synthesis, delivering best Power Performance Area for block/tile
  • Expertise in Formality checks (RTL vs NL, pre Scan vs Post Scan, RTL vs RTL)
  • Experience in power implementation methodology, UPF
  • Static timing analysis (as part of synthesis timing analysis)
  • Experience working with physical design team/ aware of physical design requirements
  • Comfort with Scripting such as Ruby, Perl, Shell and TCL is a plus
  • Demonstrates expertise in the following:
            - Computer architecture
            - Logic design
            - Register Transfer Level (RTL) coding for high speed designs

        - Performance simulators
        - Power saving techniques
        - Exposure to Physical Design and Verification methods
        - Experience with Synthesis, Place and Route, and Timing closure
        - Strong Problem Solving and Debugging Skills
        - Excellent Communication and Documentation Skills 

 

ACADEMIC CREDENTIALS:

  • 10+ years of experience in SOC Design and Verilog RTL Development
  • BE/B.Tech/ME/M.TECH or equivalent ECE/EEE

 

LOCATION:

Job location Bangalore


AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV

 

 

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Requisition Number: 80274 
Country: India State: Karnataka City: Bangalore 
Job Function: 
Design  

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