79674_PCIE IP Verification Engineer

Location: Beijing, Beijing, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

PCIE IP Verification Engineer

 

THE ROLE:

AMD NBIO (North Bridge IO) team delivers industry leading high-performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles.  NBIO global operates seamless from China, North America and Europe.

PCIe IP is one of the most important IP in all AMD’s projects. Shanghai PCIe team contributed a lot on the first PCIe Gen4 product and are working on Gen5 product. So, this role provides a great opportunity for working on the most advanced PCIe technology.

As a global team, the candidate also has opportunities to travel to Canada, Serbia or America to attend some technique conferences, face to face to talk with global technique leads.

 

THE PERSON:

Good communicate skill, co-work spirit, strong self-learning and adaptability are preferring.

 

KEY RESPONSIBILITIES:

  • PCIe controller verification
  • Work with architecture/IP designers to get a full deep insight on the design under test
  • PCIe IP test bench build, verification component build

 

PREFERRED EXPERIENCE:

  • Complex IP Design Verification, direct experience in IP/SOC or Processor (CPU or GPU) or Industry bus standard (PCI-e, HT) is preferred.
  • Good knowledge of at least one verification methodology. UVM is preferred
  • Good knowledge of Verilog/C/C++/System C/SystemVerilog.
  • Verification insights into random techniques.
  • Experience of verification lead is an asset.
  • Experience of PCIe verification is an asset.
  • Experience in power verification is an asset.
  • Verification of Virtualization is an asset.
  • Good at both Oral English and written English

 

ACADEMIC CREDENTIALS:

MSEE within 2-5 years, or BSEE within 4-7 years’ experience in digital ASIC/SOC design verification

 

LOCATION:

Shanghai

 

APPLY:

Email to bella.yu@amd.com

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV

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Requisition Number: 79674 
Country: China State: Beijing City: Beijing 
Job Function: 
Design  

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