Manager, Memory PHY RTL Engineering - 110587

Location: Boxborough, Massachusetts, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Manager of Memory PHY RTL Engineering

 

The Person:

Will have strong analytical/problem-solving skills and pronounced attention to details. Have significant leadership and management success. Must be a self-starter, and able to independently drive tasks to completion. Will have strong interpersonal and communication skills

 

The Role:

The Memory IO team is looking for a passionate and experienced Firmware Manager to lead the design team for the development of high-speed LPDDR,DDR and inter-chip IO IPs.  Lead the definition, design and development phase of industry-leading Memory PHYs and interface IP.  This opportunity includes enabling of new PHY designs at the microarchitecture, firmware/hardware co-design, and algorithm design level.  

 

Lead the team that delivers Industry leading IP and help our experts in RTL, FW, circuit and architecture teams develop leading edge Memory interfaces.  

  

RESPONSIBILITIES:

  • Manage and Lead the firmware design team
  • Firmware design of PHY & DRAM training steps
  • Firmware design of PHY & SoC Power Management
  • Pre-silicon coding and simulation against Architectural and RTL models
  • Post-silicon algorithm optimization and tuning
  • Post-silicon training enhancements to enable robust links for higher reliability / higher frequency margin
  • Working with SoC/Product firmware teams to define features and specs

 

Preference & Skill Sets:

  • Validated leadership and management experience
  • Excellent knowledge of C, C++ and any scripting language ; knowledge of Verilog and Python is a plus
  • Ability to adapt learn new toolsets and frameworks is required
  • Strong understanding of synchronization techniques (handshakes, message passing) ; knowledge of hardware level clocking and  synchronization is a plus
  • Post-silicon experience developing firmware on real hardware is required. Experience with SERDES, DDR, Memory Controller, or MAC Design experience is preferred
  • Strong understanding of computer organization/architecture.
  • Laboratory experience, including the use of equipment: oscilloscopes, logic analyzers, etc.
  • Experience with low level, physical phenomena oriented logic design is an asset (dealing with IO, clocking, voltage control, etc.)

 

EDUCATION:

  • Bachelor's degree in Electrical or Computer engineering is required. Master's or PhD degree is a plus.

 

Location : Santa Clara CA, Boxborough MA, Austin TX, Markham ON

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AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability, or any other characteristic protected by law. EOE/MFDV



Requisition Number: 110587 
Country: United States State: Massachusetts City: Boxborough 
Job Function: Design
  

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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