Design Verification Engineering Architect - 75199

Location: Austin, Texas, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

DESIGN VERIFICATION, TESTBENCH / UVM METHODOLOGY ARCHITECT

 

THE ROLE:

The AMD Verification Methodology and Technology (VMT) team delivers verification methodology and technology for all AMD teams and products. Team member will be working with global teams on the verification methodologies and technologies covering design technology, functional verification technology, coverage, debug, static check and sign-off technology, formal verification, low power technology, DFX technology and complex system level design description and automation methodologies.

 

THE PERSON:

A successful candidate in this senior position is expected to excel in analytical thinking, problem solving, organizing data, gathering requirements, planning and execution. He/she needs to be a self-starter who collaborates well with team members and customers alike to successfully drive tasks to completion.

 

 

KEY RESPONSIBILITIES:

The successful candidate will assume technical leadership and hands-on architect role responsible for providing complex design methodologies in the hardware design verification space. The following is a list of key responsibilities that the candidate will assume:

  • Be a part of a wider team of technical experts in design verification and testbenches in AMD's Central R&D team
  • Be hands on technical leader in the space of hardware description languages such as SystemVerilog and VHDL and an expert in digital design and RTL coding
  • Play an expert role in verification methodologies and have extensive knowledge and multi-year hands on experience testbench-based random design
  • Possess and utilize in-depth knowledge in functional and code coverage technology gathering, management and utilization including concepts around coverpoints, covergroups, etc.
  • Drive methodology around SOC/IP verification, Verification IPs, UVCs and bus functional models
  • Demonstrate and utilize strong debugging skills in industry standard SOC/IP design & verification tools
  • Provide methodologies to achieve fast coverage closure mechanisms
  • Provide methodologies on logic functional verification technology and methodology (UVM)
  • Have knowledge of Verification Management tools and methodologies
  • Play a strong role in understanding AMD's existing systems, creating new ones, defining roadmaps, creating methodologies around DV and VIPs, UVCs, BFMs
  • Provide leadership in testbench technologies such as randomization, coverage, stimuli reuse (Portable Stimulus)
  • Collaborate with EDA vendors for tool trainings, evaluation and deployment and drive EDA vendors toward common solutions across AMD
  • Utilize experience in Verilog/SystemVerilog, register descriptions and functional modeling
  • Work on low power technology and methodology (UPF, VSI/VCLP, NLP, PTPX, Power analysis)
  • Provide guidance in complex system design abstraction and automation around it including IP-XACT technology and methodology R&D
  • Utilize strong knowledge on hardware register design, verification and implement automation around automatic register flow generation
     
    IDEAL CANDIDATE WILL HAVE:
  • Solid, hands-on deep technical industry experience with Verilog, testbench, UVM a MUST
  • Strong understanding of digital electronic design and design verification processes
  • Versatility in verification methodology like UVM as well as knowledge of industry standard tools for DV, testbenches, VIPs, etc. expected
  • Be aware of the latest developments in the industry on Design Verification topics
  • Knowledge of Verilog, C, C++, Perl, Python, Ruby, and other scripting languages; experience with TCL is a plus; IP-XACT knowledge a plus
  • Emulation and/or simulation acceleration experience is a plus
  • Experience in EDA industry tools, scripting and software development practices
  • Hardware/software co-verification and validation methodologies is a plus
  • Must possess Strong interpersonal and communication skills and needs to be a team player
     
    EDUCATION:
  • Bachelors, Masters or PhD degree in Electrical or Computer engineering (preferred)

 

#LI-LS1



Requisition Number: 75199 
Country: United States State: Texas City: Austin 
Job Function: [[customString7]] 

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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