Manager - SOC Verification Engineer ( 85463)

Location: Hyderabad, Telangana, IN

Company: Advanced Micro Devices

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What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.


Manager Verification Engineer


    This person will be part of next generation Server SoC Verification team and will be responsible for handling and grooming a team. Requires strong hands-on knowledge of all facets of the IC design process and good understanding of Verilog/SV/UVM. A Person who will interact with multiple teams from multiple locations.

    Key responsibilities:

  • Responsible for working in pre-silicon verification for full chip, blocks, multi-chip and system-level verification
  • Responsible for driving/handling full chip verification or sub-system verification
  • Responsible for handling and grooming a team
  • Specifying design verification plan at soc level/IP level
  • Specifying or reviewing verification plans for sophisticated blocks within the ASIC
  • Responsible for developing sophisticated verification environment using the latest coverage/assertions based verification design methodology, which includes :
  • self-checking, reusable, automated verification environment : both at full-chip & block level
  • Constrained random generators and reference models
  • Carve out the scope and work hands-on on functional verification
  • Own the tasks
  • Guide/mentor junior members on the team
  • Work with internal/external partners to drive company-wide solutions
  • Preferred experience:

  • Minimum 14+ years of experience in ASIC Design Verification
  • Should have solid understanding design verification (SOC and/or IP level)
  • Must have an experience in driving/leading verification tasks
  • Must have an aptitude towards handling and grooming team
  • Must have good knowledge of ASIC Design Flow and SOC architecture
  • Experience in developing complex testbench/model in Verilog, System Verilog or SystemC
  • Experience with coverage-based verification methodology
  • Experience in writing testplans and testcases
  • Excellent debug skills in functional simulations are must.
  • Experience in random test generation, coverage analysis, failure debug
  • Experience in low power concepts/verification (NLP/UPF) and emulation is good-to-have
  • Strong Verilog, SystemVerilog, PLI interface, C/C++, Perl/shell scripts programming skills
  • Must have very strong interpersonal skills and the ability/desire to foster a team/global environment
  • Academic credentials:

    B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering with Digital Systems/VLSI as major

    Location: Hyderabad, India

    We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.







Requisition Number: 85463 
Country: India State: Telangana City: Hyderabad 
Job Function: 

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