Design Verification Strategy Engineer - 81298

Location: Markham, Ontario, CA

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

 

 

Design Verification Strategy Engineer

ROLE:

We are the Multimedia Design Verification Strategy team based in Markham, Ontario, Canada.  We focus on driving design modeling frameworks, verification methodology and infrastructure, and cutting-edge FPGA based HW acceleration.   As a member of this progressive team, you will be responsible for shaping the future of our design and verification processes, architecting and implementing verification and modeling frameworks, and deploying seamless design acceleration solutions.  You will have direct hands-on exposure to verification methodology, design/debug, flow automation, and framework deployment.

 

KEY RESPONSIBILITIES:

  • Architect, develop, and debug verification and modeling foundational frameworks and flows
  • Enable re-use of C++ based models for use in architecture, functional and performance verification, and software development
  • Develop and adapt infrastructure and models for FPGA based hardware acceleration solution.
  • Design and implement models and testbenches in UVM, SystemC and C/C++.
  • Automate and improve verification and acceleration efficiency.
  • Think outside the box!

 

REQUIREMENTS:

  • 5+ years of hands-on experience in one or more of the following:
    • Working with hardware design IP teams in a verification or software modeling role
    • Developing, integrating and debugging high level C++ design models (functional and performance) into simulation environments
    • Developing UVM based verification frameworks and testbenches, processes and flows
    • Experience with FPGA platforms for one or more of HW acceleration for design verification, architectural prototyping and virtual platforms for SW enablement
    • Automating workflows in a distributed compute environment
    • Exposure to simulation/acceleration/HLS tools
  • Strong background in the C++ language, preferably on Linux with exposure to Windows platform
  • Strong software development and SCM based management principles
  • Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
  • Good working knowledge of SystemC and TLM with some related experience
  • Scripting language experience:  Perl, Ruby, Makefile, shell preferred.
  • Exposure to HLS design flows and process is an asset!
  • Good interpersonal skills (verbal and written).
  • An organized, enthusiastic self-starter, strong interest in hardware verification methodologies.

 

EDUCATION:

  • Minimum BaSC/BSEE/CE, or equivalent degree or above

 

#LI-EM1



Requisition Number: 81298 
Country: Canada State: Ontario City: Markham 
Job Function:Design
 

 

AMD is an inclusive employer dedicated to building a diverse workforce. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective provincial human rights codes throughout all stages of the recruitment and selection process. Any applicant who requires accommodation should contact AskHR@amd.com.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services.

 

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