Silicon Design Verification Engineer

Location: Austin, Texas, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

The Role: AMD is looking for a Design Verification Engineer that is willing to take on the challenge of becoming part of the PCIe IP & Sub-System Design Verification team. In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers, Personal Computers and Graphics Cards. The team is responsible for the Verification of several critical IPs as well as their Sub-System level interoperability. The Design and Design Verification groups within the PCIe team are responsible for developing and verifying an architecture balancing power consumption and performance, using the latest Verification techniques, and delivering high complexity RTL and DV components.


Key Responsibilities:

  • Work with high-speed, low-power RTL designs from definition to implementation and verification sign-off
  • Verify critical digital designs using both coverage-driven random and directed testing techniques as well as Formal Verification
  • Own some or all aspects of the Verification flow from initial test planning to coverage convergence and sign-off of an IP or Sub-System
  • Build DV components and develop test and sequence libraries applying OOP Verification techniques in SystemVerilog following UVM methodology, as well as C++ Verification techniques


Preferred Experience:

  • Strong background in ASIC Design Flow
  • Expertise in Design Verification
  • Proficient in Verilog, System Verilog and C++
  • Experience verifying complex designs using UVM, OVM or VMM
  • Familiarity with industry standard high-speed protocols such as PCIe, SATA, USB or Ethernet is a plus
  • Experience with verification of Hardware-Firmware interaction is highly desirable
  • Strong analytical and problem-solving skills with pronounced attention to detail
  • Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality


Academic Credentials: Bachelor’s or Master’s in Computer or Electrical Engineering


Location: Austin, TX





Requisition Number: 169923 
Country: United States State: Texas City: Austin 
Job Function: Design

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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