Senior Staff RTL Design Engineer - 77511

Location: Markham, Ontario, CA

Company: Advanced Micro Devices

Apply now

Apply for Job



What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

 

 

Senior Staff RTL Design Engineer

 

The Role:

 

Our team is an AMD Center for Excellence for high-performance, low-power, flexible, scalable and configurable I/O interconnect that spans across all AMD product lines.  We attract a great diversity of talent, and have engineering design teams located in several countries around the world.  The opportunity on this team will have you developing next generation technology that will be part of future AMD Microprocessors powering Cloud Servers, Desktop PCs, Notebooks, Graphics Cards, Game Consoles, VR sets, and more. 

 

The Person:

 

Leadership attributes to assume technical ownership.  Strong analytical/problem solving skills and pronounced attention to details. Must be a self-starter, and able to independently drive tasks to completion. Strong interpersonal and communication skills with management, peers, and subordinates.  You are an RTL Design Engineer/Lead.  Your contemporaries are other RTL Design Engineers, IP Architects, Front-End Design Engineers, Design Verification Engineers, Firmware Engineers, and Post-Silicon Engineers.

 

Responsibilites :

 

Ownership of custom digital logic for I/O interconnect solutions for die-to-die, package-to-package, and socket-to-socket connectivity, from specification to implementation, spanning major industry-standards and proprietary protocols, targeting bleeding-edge technology nodes, and interfacing to both in-house and third-party PHYs and I/O controllers.

 

  • Taking Architectural Requirements to Micro-Architecture Specification and RTL Implementation
  • Being a Subject Matter Expert for an IP or IP Subsystem, supporting Architects, and driving Design Implementation
  • Carrying out front-end Digital Design for RTL coding, scripting, and automation for highly configurable IP
  • Conducting and subjecting to documentation and code reviews
  • Contributing to test plans and calling out design and verification requirements for tracking
  • Supporting Synthesis, Logical Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Static Timing Analysis (STA)
  • Creating Engineering Change Requests (ECRs) and implementing and verifying Engineering Change Orders (ECOs) on RTL, and on synthesized, pre- and post-route netlists
  • Coordinating with leads from other teams such as DFT, analog and mixed-signal design, protocol-specific PCS design, I/O controller teams, microcontroller firmware, IP/SOC deployment, front-end design, physical design, post-silicon validation, etc.
  • Interfacing with internal and external development partners, IP vendors and service providers
  • Occasional creation of utility software using C++, Perl, Python, or other typical scripting and programming languages
  • Coordinating Design Verification, Front-End Integration, and IP/SoC Deployment related activities
  • Scoping effort, resources, and development schedules for new features and change requests
  • Proactively participating in project planning, creating and maintaining schedules, managing dependencies, and ensuring quality of deliverables at committed milestones
  • Leading, supervising, coaching, and mentoring junior engineers

 

PREFERRED EXPERIENCE & SKILL SETS:

 

  • RTL design (ASIC) experience is required.
  • Excellent knowledge of Verilog, as well as Perl, Python, or any suitable scripting language
  • Strong understanding of interaction of digital and analog design at 7nm and below 
  • Experience with low level, physical phenomena-oriented logic design (dealing with IO, clocking, voltage control, etc.)
  • Specific experience in I/O protocol, particularly at the lower layers (PCS, SerDes, PHY)
  • Knowledge in one or more industry-standard high-speed I/O protocols (e.g. PCI Express, 1/10/100Gb Ethernet, SATA, USB3.x/4, HDMI, DisplayPort, etc.)
  • Power/thermal management experience
  • DFT knowledge/expertise
  • Understanding of computer organization/architecture
  • Laboratory experience, including the use of equipment: oscilloscopes, logic analyzers, etc.

 

Education :

Electrical or Computer Engineering

 

*LI-AP1



Requisition Number: 77511 
Country: Canada State: Ontario City: Markham 
Job Function:Design
 

 

AMD is an inclusive employer dedicated to building a diverse workforce. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective provincial human rights codes throughout all stages of the recruitment and selection process. Any applicant who requires accommodation should contact AskHR@amd.com.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services.

 

Apply now

Apply for Job

Share this Job