Silicon Design Engineer 2 - 74137

Location: Markham, CA

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

 

 

Our team will welcome candidates with strong analytical and problem solving skills, good knowledge of ASIC hardware design and strong programing abilities and good communication skills. Prior knowledge of DFT is plus but not a must. We will help you gain the knowledge and skills necessary is DFT field as part of the on-the-job training.

Design-for-Test is a very unique cross functional field in ASIC design. Engineers working in this field in addition to learning DFT design specifics will also gain a lot of knowledge in ASIC clock and reset structures, low power design techniques such as power-gating voltage-domains, IOs, PHYs and PLL operations, etc…

 

The qualified candidate will work as part of Design-For-Test (DFT) team to perform some or all the below functions:

 

  • Implement SCAN Insertion for different IPs in state of the art SoC chips.
  • Perform ATPG (automatic test pattern generation) for IPs and SoCs.
  • Run ATPG patterns simulations and perform debug of the failures.
  • Analise ATPG test coverage of different IPs and work with architecture and design teams on design improvements in order to achieve better test coverage.
  • Work with DFT CAD team and participate in Scan/ATPG CAD flow improvements.
  • Participate in ATPG patterns bring-up on ATE (Automatic Test Equipment) when the first silicon is back.

 

Requirements/Qualifications:

 

  • BS in EE & CS. MS preferred, with 3+ years' experience
  • Hands on working experience on ASIC design and/or verification and/or testing/validation
  • Experience with micro-processor design is a plus
  • Knowledge of scripting programing languages (TCL, Perl) is a plus.
  • Knowledge of C++, System Verilog, UVM verification methodology is a plus.
  • Experience in complex ASIC design in DFT/DFD techniques such as JTAG/IEEE standards, scan and ATPG, on-chip scan pattern compression and at-speed testing using PLL, memory BIST and repair, power-gating, on-chip debug logic – is a big plus but is not a must have requirement.
  • Strong analytical/problem solving skills and pronounced attention to details.
  • Must be a self-starter, and able to independently drive tasks to completion.
  • Strong interpersonal and communication skills

#LI-GK1



Requisition Number: 74137 
Country: Canada State: Ontario City: Markham 
Job Function: Design 

 

AMD is an inclusive employer dedicated to building a diverse workforce. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective provincial human rights codes throughout all stages of the recruitment and selection process. Any applicant who requires accommodation should contact AskHR@amd.com.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services.

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