Summer 2022 Graphics IP Co-Op/Intern - (117181)

Location: Orlando, Florida, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

 

THE ROLE:

 

Join an industry leading Graphics IP team which specializes in the design and verification of the Control Subsystem.  You will own critical tasks which directly impact the quality of design.  This role will require reading a graphics architectural specification, implementing C++ Object Oriented graphics modules, matching C++ module behavior with RTL simulation, debug of existing modules, support design verification test planning, and meet metrics requirements according to project schedules.

 

MUST-HAVE PROFICIENT EXPERIENCE AND SKILLS:

 

  • IP level ASIC Software Design
  • Proficient in C++ debug tools in Unix/Linux OS environments
  • Verilog, System Verilog, C familiarity
  • C++ expert
  • Debugging RTL and C++ code using simulation tools
  • Graphics pipeline knowledge

 

THE PERSON:

 

     Communication:

 

          Listens carefully, starts a task only after the requirement, expectations, and schedule are aligned with stakeholders

          Ask questions about priority, efficiency, and value; ensure the answers are grasped, demonstrate it progressively in action

          Present (email, chat, in-person) concise, convincing descriptions and supporting information to expedite issue closure with the team

 

     Analytical thinker:

 

          Subdivide an issue into its parts, theorize root causes, capture evidence, seek guidance where appropriate

          Superb attention to detail but only to the level necessary

          Comprehend complex ASIC architectural, design, and verification concepts

 

     Self-Starter:

 

          Able to work independently and challenge oneself every day

          Humbly seek guidance from peers and management while achieving business and career goals

          Enjoys working in a fast-paced, multi-project team environment using state of the art tools and technology

 

     Team Spirited:

 

          Thrives in an environment of technical, and passionate engineers

          Appreciates the value of diverse personalities which make the job rewarding and inspiring

          Unified commitment to business objectives

          Strong level of team-oriented encouragement

          Optimistic but balanced with realistic expectations

          Respectful of team members and collaborates for the best solutions

          Continuously improve how the team meets requirements (Quality)

 

KEY RESPONSIBILITIES:

 

     Collaborate with architects, hardware engineers, and verification engineers to understand the Control Subsystem, and the blocks and features that will be verified

     Estimate the time required to complete the creation of the C++ modules

     Support the design and verification team members in a UVM environment

     Debug test failures to determine the root cause; work with engineers to resolve design defects and correct any C++ module errors

     Contribute to review of functional and code coverage metrics; enhance the C++ modules to enable better verification

     Identify and implement opportunities for improving AMD’s ASIC design and verification environment

 

PREFERRED SKILLS (ONE OR MORE):

 

     Configuration Management - Perforce

     Issue Tracking - Atlassian JIRA

     Hardware Verification Test Plan

     Constrained Random Verification (CRV)

     Coverage Driven Verification (CDV)

     System Verilog Assertions (SVA)

     System Verilog Functional Coverage (SFC)

     Static Verification (Formal)

     Hardware/Software Co-Verification

     Emulation

     Shell Scripting

     Perl

     Ruby

     Python

     PHP

     Web Development

     Database - SQL, mySQL, or postSQL

     OS - Windows/Unix/Linux, LSF

     Cloud - Azure, AWS, Compute Farm / Remote Computing

     Data Analysis - AI/ML

     3rd Party Automation Tools - Jenkins

 

ACADEMIC CREDENTIALS:

 

     BS degree in Electrical or Computer Engineering and 2 years applicable experience

     or MS degree in Electrical or Computer Engineering and ASIC Design/DV project related experience

 

AMD is a government contractor and subcontractor. As required by Executive Order, our US employees are required to be fully vaccinated against COVID-19 regardless of the employee’s work location or work arrangement (e.g., telework, remote work, etc.), subject to such exceptions as required by law. If selected, you will be required to be vaccinated against COVID-19 and submit documentation of proof of vaccination by January 4, 2022. AMD will provide additional information regarding what information or documentation will be needed and how you can request an exception from this requirement if you have a need for a religious and/or medical accommodation.

 



Requisition Number: 117181 
Country: United States State: Florida City: Orlando 
Job Function: Student/ Intern/ Temp
  

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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