Radeon SOC Power Management Architect

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Power Management Architect

The Role:

Drive the definition, tradeoff studies, protyping, implementation and verification of the Power Management Architecture features and algorithms for Radeon gaming and datacenter GPUs. Collaborate closely with a wide array of engineering disciplines to create leadership products that delight our customers.

The Person:

This is an experienced engineer who brings a deep understanding of SoC and Platform architecture, Power Management concepts and algorithms, and a passion to drive perf/watt and perf/$ optimizations for worldclass GPUs. Previous experience in the areas of voltage margin optimization, reliability and yield management, statistical analysis of silicon manufacturing/test data will be a bonus.

Key Responsibilities:

• Drive Power Management advances and multi-generational roadmap in the area of voltage optimization, with an eye on silicon reliability and yeild, to maximize power and cost constrained performance for Radeon graphics platforms 
• Take ownership for developing and driving PM features from concept through product launch for a family of SoC devices with varying configurations and target market segments 
• Work cross functionally with Software, Firmware, SOC, IP, Platform, Technology, Product teams through every stage of product development, evangelize for power efficiency, lead broad forums and drive product definition alignment 
• Work with product teams to understand the Perf/Power/Cost requirements
• Drive power management feature definition per SoC program
• Develop system level models, analyze return-on-investment and evaluate trade-offs
• Document specifications
• Guide power management feature implementation, verification, emulation and post-silicon validation in an engineering resource efficient and scalable manner
• Coach and mentor other engineers as a technical leader 

Preferred Experience:

• Proven experience with GPU or CPU power architecture, PPA tradeoffs, power management algorithms, embedded microcontroller firmware, hardware test and verification environments
• Solid background in electrical circuits, VLSI and circuit design fundamentals
• Familiarity with ASIC/SoC Design cycles and methodologies including RTL, Verification, Emulation, Physical Design and post-si validation
• Background in prototyping and proof of concept of new complex architectures and algorithms in hardware/software/firmware using physical and/or emulation platforms will be a plus
• Programming skills in C/C++, scripting with Perl or Python
• Previous experience in the areas of voltage margin optimization, reliability and yield management, statistical analysis of silicon manufacturing/test data will be a major differentiator
• Ability to work cross functionally with HW/SW and Pre/Post Silicon teams, lead by influence and strong communication skills

Academic Credentials:

• Bachelor's Degree in Electrical Engineering, Computer Engineering, or another relevant field. Masters or Ph.D. preferred

Location: Santa Clara, CA - Austin, TX - Markham, Ontario

#LI-SW2

Requisition Number: 150682 
Country: United States State: California City: Santa Clara 
Job Function: Product Engineering  

Benefits offered are described here.

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