Display IP Design Verification Engineer - 109822

Location: Roseville, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

Display IP Design Verification Engineer



The candidate would participate on a team of design verification, architects and design engineers, working closely with other team members to understand and verify the functionality of the design within the context of the unit, block, and overall system. The candidate would be responsible for carefully documenting and executing test plans consisting of directed and random tests to be run under simulation and hardware acceleration. Experience with hardware modeling, assertions, and formal verification methods are valuable assets. The candidate would be expected to adopt evolving verification methodologies used in the industry as well as develop custom techniques to functionally verify increasingly complex IP designs within aggressive, market-driven schedules.

Understand the architecture of the Display IP and functional block being designed
Build SystemVerilog and/or C/C++ models and test sequence libraires for simulation
Build test bench and monitors for DUT
Compose test and coverage plan, and validation vectors to ensure functional completeness
Debug function/performance bugs of Display IP in Emulation and Simulation Environments

Experience Required:
3+ year(s) of proven verification experience on large ASIC development projects or equivalent embedded programming experience with a deep understanding of hardware architecture
Very strong background in C/C++/OOO coding techniques
Experience with Verilog and/or System Verilog
Experience working with Cadence NCSIM, Synopsys VCS or equivalent
Experience working with UVM, OVM or equivalent
Experience with scripting languages, Ruby/Python/Tcl/BASH/etc.
Working knowledge of UNIX/Linux operating systems and debug tools
Interest in developing custom verification tools and driving new test methodologies
Strong analytical skills and attention to detail
Excellent written and communication skills
Team player with proven leadership skills

Education and Experience Required:
Min. Bachelor of Science Degree in Electrical Engineering, Computer Science, or Computer Engineering.



Requisition Number: 109822 
Country: United States State: California City: Roseville 
Job Function: Design


AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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