Lead Emulation Engineer

Location: Roseville, California, US

Company: Advanced Micro Devices

Apply now

Apply for Job


What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

LEAD EMULATION ENGINEER

 

THE PERSON:

Emulation Engineers are active technical leaders inside and outside the company in the field of pre-silicon validation. In an ideal engineer, we are looking for talented and passionate Emulation engineer to develop Emulation environment for the next generation Server CPUs. Pre-SI System Level Verification is a huge challenge in complex CPU projects. This position enables to gain deep understanding of complex CPU Architecture/u-Architectures, protocols and HW-SW interactions to hunt system level corner case bugs. Work includes implementation of real life tests, SW workloads, drivers and end-to-end flow checkers on high-end fast emulation platforms simulating hundreds of millions of cycles to find the most complex CPU bugs.

 

THE ROLE:

In this capacity, you will work with cross functional team - RTL, Val / Verification, Emulation Transactor, BIOS, microcode, emulation test teams and emulation tools vendors - to define and execute emulation model build and bring-up. You will work the multiple stakeholders to define emulation platform requirements, understand micro-architecture and architecture of SOC including processors, NOC, high speed memories, security, etc and also the emulation transactors. Analyze the scope, define, build and bring-up emulation models, adapt and enhance the debug infrastructure, which includes debug infrastructure development, debug failures and ensure functionality as per specifications.

 

PREFERRED EXPERIENCE:

  • Knowledge with FPGA. 
  • SW Knowledge in: C++, Python and Perl - advantage. 
  • Knowledge with RTL design, Verilog and simulation, debug tools such as Verdi, System Verilog based verification techniques. 
  • Team player, passionate, energetic, motivated, and self-driven

 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in Electrical, Electronics or Computer Engineering. 

 

LOCATION:

Roseville, CA

Folsom, CA

 

#LI-LM1


Requisition Number: 164924 
Country: United States State: California City: Roseville 
Job Function: Design
  

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

Apply now

Apply for Job

Share this Job