Lead Analog/Mixed Signal Design Engineer

Location: San Jose, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

Job Description

  • Lead an analog/mixed signal silicon IPs design team with a domain focus on high speed/low power PLL and Clocking,
  • End-to-end ownership of PLL design and development, from concept phase to post-silicon optimization
  • Development of workflows and methodology for best in-class/best PPA PLL/Clocking circuits designs.
  • Contribute to the definition of microarchitecture and circuit architecture for the implementation of various PLL and clocking blocks.
  • Drive various domains (e.g. Analog Design, Digital Design, Architecture and Design Verification, Layout) across different geographies and time zones, to ensure successful cross-team engagement and high-quality execution
  • Responsibilities include high level planning, work breakdown planning, tasks assignments and progress tracking, schedule and priority management, performance review, mentor, talent development, and hiring.
  • Ensure quality of work within schedule and mitigate overall risk
  • Contribute to the definition of flows that improve efficiency and quality of execution
  • Manage circuit verification flows to confirm design meets performance, power, reliability and timing requirements. Work closely with the mask design organization to deliver the physical design as well as define production/bench-level test plans with post-silicon characterization groups for silicon evaluation to ensure interlocked and high-quality execution



Job Qualifications

  • 10+ years of professional experience in the semiconductor industry with focus on analog/mixed signal silicon IP design and development. Master’s in electrical engineering . PhD is preferred
  • Experience managing small to medium size  design engineering teams. Able to lead a team effectively, with good interpersonal skills, enthusiasm and positive energy
  • Experience in FinFET & Dual Patterning nodes such as 16/14/10/7/5nm nodes
  • A consistent record of successfully leading analog/mixed signal design  teams
  • A proven track record of successful design and productization of analog/mixed signal silicon IPs. Direct hands-on experience in PLL/Clocking circuits design is highly desirable.
  • In-depth knowledge of analog, digital, and semi-digital PLL/DLL architecture
  • Extensive experience in Mixed signal/Analog Circuit Design for clock generation, cleanup and distribution blocks specifically in DLL/PLLs and associated subblocks including VCO, charge-pump, dividers, state machines, LDO, feedback and compensation techniques, precision analog bias and bandgap, TDC, interpolator circuits, high speed buffers.
  • Solid knowledge of industry-standard tools and outstanding practices for analog/mixed signal design
  • Analytical thinking and inventive spirit in combination with a proven understanding of risks and risk mitigation
  • Quality-oriented mindset with Strong, effective communication and leadership skills
  • Strong and effective communication skills and team spirit. Enthusiastic team-first mentality.





Requisition Number: 153283 
Country: United States State: California City: San Jose 
Job Function: Design

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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