Staff Packaging Design Engineer

Location: San Jose, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

KEY RESPONSIBILITIES: 

  • Perform package extraction for the time domain and frequency domain analysis 
  • Provide design guidelines for the Package design 
  • Power integrity analysis for state of art package/system designs, which include but not
  • limited to package layout model extraction, transient noise analysis (ADS, HSPICE) to meet the silicon noise spec, decoupling strategy and analysis.  
  • SSN(Simultaneous Switching Noise) analysis for I/O (DDR5, LPDDR5, etc.) power domain.  
  • Eye diagram and jitter analysis for die-package-PCB co-simulations. 
  • Signal integrity simulation and optimization on package stack-up, power/ ground plane assignment and optimization, decoupling cap locations to minimize power ground noise. 
  • Opportunity to work on high speed and RF signal trace routing, via optimization,
  • length matching and the impact to the timing. 
  • Crosstalk analysis and reduction on-package considering mutual-effect by on-die, on-silicon interposer and on-PCB. 
  • Full-wave modeling of vias, connectors, package and PCB channels, components using 3D full-wave EM tools.


PREFERRED EXPERIENCE:

  • Solid background on transmission-line theory and computational electromagnetics. 
  • Industry working experiences on signal integrity and power integrity in one or more of signaling standards, PCIe gen4/5, PAM4/8, Ethernet, DDR5, LPDDR5, HBM2/2e/3. 
  • Experiences with SI tools, HSPICE, HFSS/Q3D, PowerSI/PowerDC, ADS or similar. 
  • Hands-on lab experiences using high speed real time scope, VNA, TDR, and spectrum analyzer will be a plus. 
  • Familiar with RF designs, high speed package designs, or high speed PCB designs will be a plus. 
  • Knowledge and experience of on-die noise model will be a plus

 

ACADEMIC CREDENTIALS:

  • Master or Ph.D Degree in Electrical Engineering or Computer Science; 5~7+ years experience desired

 

#LI-JW2


Requisition Number: 173383 
Country: United States State: California City: San Jose 
Job Function: Design
  

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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