FPGA Design Verification Engineer

Location: San Jose, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Job Description

Xilinx Central Products Group (CPG) is looking for a FPGA Design Verification Engineer, who can provide technical leadership and contribution Block and Subsystem level verification.

Your experience and expertise in developing advance SystemVerilog and UVM based testbench and Automation that can scale with Full-Chip will enable improved quality and execution of Xilinx’s devices.

Work includes Test Planning, testbench architecture, execution, tracking, coverage closure, and delivery to programs

 

 

Job Qualifications

  • Candidate is expected to be a strong team player with good communication and leadership skills
  • Experience with development of UVM/OVM and/or Verilog, System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS.
  • Strong understanding of state of the art of verification techniques, including assertion and coverage-driven verification. 
  • Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management.
  • Experience with python or any other scripting language is a plus.
  • Experience with gate-level simulation, power verification, reset verification, contention checking is a plus

 

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Requisition Number: 176801 
Country: United States State: California City: San Jose 
Job Function: Design
  

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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