Senior Staff Analog/Mixed Signal Design Engineer

Location: San Jose, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Be part of AMD’s analog/mixed signal IP design team responsible for the design and development of next generation IOs, high speed memory (LPDDR5, DDR5, GDDR6, HBM2/HBM3) and chip-to-chip Gb/s proprietary PHY IP solutions.

 

Job Responsibilities:

  • Definition, review and sign-off on IP top level and component level specifications
  • AMS components circuit and layout design
  • Supervise pre-silicon layout, post-silicon characterization and debug
  • Support products bring-up and debug, and sign-off on test-plans and characterization reports
  • Interface with SOC teams, system HW/SW teams, and global manufacturing teams

 

Job Qualifications:

  • 5-10 yrs. Experience, desired in high-speed serial and/or parallel mixed signal PHY/IO designs
  • Strong fundamentals and knowledge of mixed signal circuit architecture and design techniques for receiver/transmitter and PLL/DLL/clocking
  • Hand-on design experience in multi-Gbps serial (PCIE, USB), parallel high BW memory interface PHY/IOs (DDR4/DDR5, HBM2/HBM3, GDDR5/gDDR6) and chip-to-chip links PHY IPs
  • Experience in mixed signal design circuit blocks such as digital/analog DLLs, duty cycle corrector, clock and data recovery, clock mixer
  • Experience in low power design techniques for high speed/custom digital circuit (e.g. CMOS/CML high speed design for counters, dividers) design and analysis including transistor level timing sign-off
  • Solid understanding of power, area and performance trade-offs in mixed signal IP design
  • Design experience in FinFet advanced CMOS process nodes 16nm/7nm and below coupled with a solid understanding of transistor device performance and fundamentals
  • Proficient in AMS design flows, tools, and methodologies. Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools
  • Work with project-manager, system architects, IC designers and physical designers to guarantee quality/timely deliverables meeting project’s schedule and technical requirements
  • Track record of successfully taking designs to production
  • Excellent written and verbal communication skills able to operate without direct supervision but also work cross-functionally, cross-geographies collaborating and being part of a multi-disciplinary team in a dynamic/fast paste environment
  • Exhibit strong initiative and ownership of tasks and responsibilities. Seek help proactively, share and pass on knowledge

 

 

#LI-MH2


Requisition Number: 167462 
Country: United States State: California City: San Jose 
Job Function: Design
  

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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