Senior Silicon ASIC Design Engineer

Location: Austin, Texas, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Senior Level Silicon Design Engineer

 

THE COMPANY:

AMD's newest acquisition Pensando is a leading provider of data center networking technology. Pensando's distributed services platform will expand AMD's data center product portfolio with a high-performance data processing unit (DPU) and software stack that are already deployed at scale across cloud and enterprise customers including Goldman Sachs, IBM Cloud, Microsoft Azure and Oracle

 

We are hiring ASIC engineers to help contribute to rapidly expanding and innovative chip designs in both 7nm and 5nm process technologies. We are developing cutting-edge domain specific processors for the IAAS and smart-switch markets that leverage the P4 programming language to provide software-defined features and scale but with hard-wired performance attributes. Applications include advanced PCIe, networking, storage, and security virtualization services for both the public and private cloud markets.

 

THE ROLE:

Come join a world-class ASIC team that has developed over 30 production ASICs over the last 20 years covering the areas of networking, storage, and compute applications. We are hiring ASIC engineers to help contribute to rapidly expanding and innovative chip designs in both 7nm and 5nm process technologies. We are developing cutting-edge domain-specific processors for the IAAS and smart-switch markets that leverage the P4 programming language to provide software-defined features and scale but with hard-wired performance attributes. Applications include advanced PCIe, networking, storage, and security virtualization services for both the public and private cloud markets. Come join our growing team and make your mark in the fast-growing cloud computing industry! You will participate in the HDL design of hardware modules included in high performance Pensando-developed P4 processor pipelines, packet switches, programmable DMA engines, offload accelerators, PCIe and Ethernet interfaces, DDR4/DDR5 memory controllers, high bandwidth network-on-chip interconnects, memory caches, and ARM processor subsystems. You will utilize your digital design and system verilog HDL skills to contribute to modules that constitute the micro-architecture of our ASIC products.

 

KEY RESPONSIBILITIES:

With your solid knowledge and understanding of Computer Architecture, You will be responsible for designing and owning the RTL codes of 1 or more crypto blocks, debugging the simulation tests, solving any physical design issues related to timing / congestion / CDC etc., and validating the block(s) on emulator and on silicon.

You will be collaborating closely with your teammates in design and architecture and be responsible for defining module-level micro-architecture including interfaces, register definitions, and hardware implementation of control and data paths. You will participate in design reviews as well as contribute to design verification test plan reviews and debug. Your design and debug skills will be leveraged across module-level, full-chip, emulation, prototyping, silicon bring-up, manufacturing diagnostics, compilers, and shipping platform software.

 

PREFFERED EXPERIENCE:

Languages and tools: Verilog, System Verilog, VHDL, Perl/Python, C or C++

• Synthesis, Spyglass/Lint, Power optimization, CDC, LEC • System Verilog simulators and waveform debuggers • Accelerators/Emulation/FPGA prototyping is a plus

Design experience:

• Developing Microarchitecture and Verilog RTL • Reviewing Synthesis, Timing, Spyglass/Lint Reports and fix the RTL • Help develop and review the test plans, tests and coverage reports to create a robust tape-out

Domain knowledge:

• Experience with design and algorithms of crypto

• Experience with design and development of peripherals and storage devices

• Experience with integration of external IPs for SOC subsystems

• Experience with highspeed IO, e.g. DDR / Ethernet, etc.

• Experience with processor ISA is a plus • Experience with network protocols, e.g. L2 / L3, etc., is a plus

• Be well versed in interface timing budget & clock domain crossing design

• Working knowledge of timing and debug from the ASIC through the board to peripherals

 

ACADEMIC CREDENTIALS:

BSEE or equivalent. MSEE preferred

 

LOCATION:

Milpitas, CA

 

#LI-LM1


Requisition Number: 177194 
Country: United States State: Texas City: Austin 
Job Function: Design
  

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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