Sr Level - ASIC Verification Engineer

Location: San Jose, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Sr Level- ASIC Verification Engineer

 

THE COMPANY:

AMD's newest acquisition Pensando is a leading provider of data center networking technology. Pensando's distributed services platform will expand AMD's data center product portfolio with a high-performance data processing unit (DPU) and software stack that are already deployed at scale across cloud and enterprise customers including Goldman Sachs, IBM Cloud, Microsoft Azure and Oracle

 

We are hiring ASIC engineers to help contribute to rapidly expanding and innovative chip designs in both 7nm and 5nm process technologies. We are developing cutting-edge domain specific processors for the IAAS and smart-switch markets that leverage the P4 programming language to provide software-defined features and scale but with hard-wired performance attributes. Applications include advanced PCIe, networking, storage, and security virtualization services for both the public and private cloud markets.

 

THE ROLE:

In this role, you will be responsible for defining test strategies and plans, developing test benches and test cases, and debugging designs helping with micro-architecture.

You will participate in design verification methodology definition as well as contribute to design verification infrastructure that facilitates maximum re-use of components, improves productivity, and guarantees to the maximum extent possible, bug-free designs. Your work and skills will be leveraged across module-level, full chip, emulation, prototyping, silicon bring-up, manufacturing diagnostics, compilers, and shipping platform software.

 

KEY RESPONSIBILITIES:

With your solid knowledge and understanding of Computer Architecture you will be:

• Developing and executing test plans for Unit/IP/Subsystem/ SOC level verification
• System Verilog test bench development including stimulus, checkers, transactors/BFMs, assertions and cover points
• Identifying bugs in architecture, functionality and performance with strong overall debug and analytical skills

 

PREFERRED EXPERIENCE:
Languages and tools:
• UVM, SystemVerilog, C or C++
• SystemVerilog simulators and waveform debuggers
• Experience developing and executing test plans for Unit/IP/Subsystem/ SOC level verification
• Experience in System Verilog test bench development including stimulus, checkers, transactors/BFMs, assertions and coverpoints
• Experience identifying bugs in architecture, functionality and performance with strong overall debug and analytical skills
• Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy/DVE)
• Solid knowledge and understanding of Computer Architecture
• Excellent debugging and problem-solving skills

 

ACADEMIC CREDENTIALS:
BSEE or equivalent. MSEE preferred

 

LOCATION:
Milpitas, CA

 

#LI-LM1


Requisition Number: 177199 
Country: United States State: California City: San Jose 
Job Function: Design
  

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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