Sr. Silicon Design Engineer

Location: San Jose, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

As a Sr. Design Engineer on the SoC Physical Integration team, you'll work with various groups including Architecture, Design, and CAD while performing various tasks to ensure high quality and seamless chip level integration on the road to tape out.  Common essential duties and responsibilities include, but are not limited to: 
- Defining and developing flows and methodologies for chip level integration

- Developing tools for design verification or efficiency

- Designing (RTL and custom), verifying, and integrating FPGA/ACAP sub-blocks

- Coordinating activities between different design groups to ensure smooth integration

- Executing chip level physical verification

- Executing chip level electrical verification

- Writing scripts to improve efficiency

 

Qualifications

- Basic understanding of FPGA architecture

- Knowledge of and/or experience with design and verification tools such as Virtuoso and Calibre

- Knowledge of and/or experience with P&R tools

- Fundamental circuit design knowledge including simulation experience with Spice and Verilog

- Strong debug skills

- Scripting experience using Perl, Python, TCL, C-shell, Make and/or other scripting languages

- Knowledge and experience with basic Unix data management and job control

- Excellent written and oral communication skills
- Minimum education level/Experience:  BSEE+5 years/MSEE +3 year experience, desired

 

#LI-YE1


Requisition Number: 167189 
Country: United States State: California City: San Jose 
Job Function: Design
  

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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