Verification Co-Op/ Intern

Location: San Jose, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

The verification team at AMD is looking for a Verification Intern to contribute to the verification of Network on Chip IPs and Subsystems. The individual will help develop and use simulation and/or formal based verification environments, at block and subsystem level, to prove the functional correctness of Network-On-Chip (NOC) IPs, subsystems and SOC designs.

Education: Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering, Computer Science, or a related field is preferred. Bachelor's degree in related fields with relevant additional experience is acceptable.

Responsibilities: 

  • Plan verification of complex digital design blocks by fully understanding the architecture and design specification
  • Interact with architects and design engineers to create a comprehensive verification testplan
  • Create and enhance constrained-random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools
  • Debug tests with design engineers to deliver functionally correct design blocks
  • Identify and write coverage measures for stimulus quality improvements
  • Perform coverage analysis to identify verification holes and achieve closure on coverage metrics

General requirements:         

  • Familiarity with object-oriented programming concepts in System Verilog (preferred) or C++/python
  • Understanding of digital designs and state machines
  • Experience with software development or verification (especially with UVM, OVM, VMM methodology) is a plus
  • Knowledge of industry standard protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus
  • Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (VC-Formal, Magellan) is a plus
  • Expected Start Date: August/September 2022
  • Duration: minimum 6 months to maximum 9 months, working full time (40 hours per week) preferred or part time (20 hours per week) depending on availablity 
  • Candidate is expected to work onsite at our San Jose Office


Requisition Number: 175526 
Country: United States State: California City: San Jose 
Job Function: Student/ Intern/ Temp
  

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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