ASIC/ Layout Design Engineer

Location: Santa Clara, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

Summary:
AMD Technology & Engineering DFT team is looking for a Design Verification Engineer. The ideal candidate will have experience in the areas of design verification, production test, debug, and software development. The candidate will have demonstrated past experience delivering high quality designs.


Primary Responsibilities:

  • Own testplans and work closely with designers and other verification engineers to close on requirements
  • Develop tests or methods to guarantee design quality and completeness
  • Deploy solutions with focus on improving company efficiency and design quality
  • Debug simulations of DFX IP to be integrated into Graphic, APU, and Server products
  • Collaborate with software owners and achieve reuse across verification, emulation, and test environments


Desired Qualities:

  • Exhibits relentless commitment to help the team meet quality and development goals on schedule
  • Thrives in both a team environment and in individual contribution
  • Communicates openly and clearly in meetings, presentations, emails, and reports
  • Able to learn independently and acquire new skills required for the job


Education / Experience:

  • Must have at least BSEE degree in Computer Science, Computer Engineering, or Electrical Engineering with 7 years of experience or MSEE with 5 years of experience
  • Excellent programming skills, proficient in C/C++, SystemVerilog
  • Experienced in UVM based testbenches, drivers, monitors, assertions, and debugging in these environments
  • Prior exposure to JTAG protocols such as IEEE-1687,1500,1149.1
  • Prior exposure to Memory Bist, AMBA AXI, Power gating, ATPG scan
  • Background in post-silicon bringup and debug a plus

 

#LI-HC1

Requisition Number: 68282 
Country: United States State: California City: Santa Clara 
Job Function: Design 

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.


Nearest Major Market: San Jose
Nearest Secondary Market: Palo Alto

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