Spring 2023 Co-Op/ Intern

Location: Santa Clara, California, US

Company: Advanced Micro Devices

Apply now

Apply for Job

What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

About the department

CDFX is a centralized design group within AMD’s Technology and Engineering organization.  The group consists of design teams located in several AMD offices in North America and Asia.  It is primarily responsible for design methodology, design and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD) features for complex state-of-the-art APU computing, game console and GPU graphics products. 


Job Purpose and Key Responsibilities

  • Understand Design-for-Test (DFT) and Design-for-Debug (DFD) architecture
  • Implement and deploy automated design flows to implement DFT features in a complex SOC ASIC design or IP subsystem
  • Perform scan ATPG design rule checking, pattern generation, simulation and coverage analysis
  • Create block/chip-level Design Verification (DV) test plan
  • Develop test cases, behaviour functional models and testbench
  • Verify block/chip-level DFT/DFD features
  • Monitor regression results, debug failures and analyze DV coverage
  • Deliver production quality ATPG patterns to Production Engineering Team and support pattern bring-up



Skills And Experience Requirements:

  • Good object oriented programming skills (C++)
  • Experience with Perl/Shell scripting and C
  • Digital circuits and VLSI knowledge
  • Experience with Verilog environment is an asset
  • Strong problem solving skills
  • Good written and oral communication skills
  • Team player with strong interpersonal skills


What You Will Learn

  • Fundamentals of Design-for-Test (DFT) and Design-for-Debug (DFD) techniques (eg. Scan, memory BIST, Logic BIST, digital state machine, analog DFT, … etc)
  • Fundamentals of ASIC design and verification techniques
  • High-speed digital and analog circuits
  • Design verification infrastructure
  • Use of System Verilog, Object Oriented Programming and Universal Verification Methodology  


This team is essential to the success of AMD as a growing company. It is a dynamic and exciting ASIC design environment.  You will be working on some of the most exciting projects with leading edge technologies 

Requisition Number: 151881 
Country: United States State: California City: Santa Clara 
Job Function: Student/ Intern/ Temp

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

Apply now

Apply for Job

Share this Job