Design for Test/Design Verification Engineer- 102303

Location: Santa Clara, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

 

The Role:

AMD is looking for a DFT Design Verification Engineer within Design, Technology and Engineering. The ideal candidate will have experience in the areas of verification, production test, debug, and software development. The candidate will have proven prior experience delivering high quality designs in a fast paced, dynamic, and collaborative environment.

 

The Person:

To be successful, you will need strong multi-tasking skills and the ability to gather information independently while resolving issues. You are committed to achieving high design quality on schedule and thrive in both team environments and as individual contributor.

 

Key Responsibilities:

  • Own testplans and work closely with designers and other verification engineers to close on requirements
  • Simulate DFX design IP prior to integration into Graphic, APU, Client and Server products
  • Develop tests or methods to guarantee design quality and completeness
  • Deploy solutions with focus on improving company efficiency and design quality
  • Collaborate with software owners and achieve reuse across verification, emulation, and test environments
  • Communicate openly and clearly in meetings, presentations, emails, and reports

 

Preferred Experience:

  • Strong programming skills, proficient in C++, SystemVerilog
  • Experienced in UVM based testbenches, drivers, monitors, assertions, and debugging in these environments
  • Prior exposure to JTAG protocols such as IEEE-1687,1500,1149.1
  • Prior exposure to Memory Bist, AMBA AXI, Power gating, ATPG scan
  • Background in post-silicon bringup and debug a plus
  • Prior experience mentoring and training peers on technical topics

 

Academic Credentials:

  • BSEE degree in Computer Science, Computer Engineering, or Electrical Engineering or MSEE

Location:

Santa Clara, CA

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV

 

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Requisition Number: 102303 
Country: United States State: California City: Santa Clara 
Job Function: Design
  

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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