RTL Design Engineer

Location: Santa Clara, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

RTL Design Engineer


The Unified Memory Controller(UMC) is an IP that delivers into all SOCs that are shipped by AMD's Radeon Technology Group. We deliver discrete graphics, Data Center GPUs and Game Console APUs using a flexible controller design as the base for all our IP. We are looking for an experienced, conscientious logic design engineer in the Dram Controller IP at AMD's Santa Clara Design Center. You will be working in a fast-paced, complex environment where you will be challenged to provide elegant, robust solutions for increasingly complex features.


Responsibilities include but are not limited to:

  • Participate in the development of Architecture and Micro-architecture specifications for new features and enhancements to new features
  • Perform logic design, Register Transfer Level (RTL) coding for new features within existing blocks and design new blocks supporting HBM and GDDR DRAM Technologies
    • Deliver designs that meet functional and performance requirements,
    • Deliver design that meet physical/structural design constraints (timing, area, power)
  • Work with Verification Engineers to effectively communicate and resolve issues from test plan through feature bringup to coverage closure
  • Participate in continuous improvements around PPA tradeoffs for blocks owned by you



  • 5+ years experience in logic design implementation using hardware description language (RTL) 
  • Usage/execution of logic simulation, synthesis and familiarity with logic development flows
  • Strong RTL analysis skills including writing and debugging Verilog, Timing Analysis and implementing library / macros 
  • Hands on experience in taping out projects on cutting edge process nodes
  • Familiarity with the entire SOC design life cycle from concept to production, including Post-Silicon Debug experience



  • Bachelor's or Master's Degree in Electrical and/or Computer Engineering
  • B.S. and 5+ years or M.
  • B.S. and 3+ years of work experience with Computer architecture/digital integrated circuit (IC) design


The team is based in Santa Clara but we are open to hiring at any AMD site (Austin, TX, Boxborough, MA, Folsom, CA, Orlando, Fla and San Diego, CA).



Requisition Number: 123582 
Country: United States State: California City: Santa Clara 
Job Function: Design


AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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