CPU Design Verification Engineer (78210)

Location: Santa Clara, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

CPU Design Verification Engineer

 

The role:

In this position, you will perform pre-silicon Functional Verification of next generation high performance Microprocessor designs. It involves developing testplans, writing directed and random tests, checkers, bus functional models, debugging fails and improving tools and infrastructure.

 

The person:

We are searching for candidates who love technical challenges and are natural problem solvers. Detail oriented people who seek continuous improvement and enjoy innovation are encouraged to apply.

 

Key responsibilities:

You will be responsible to verify new microarchitectural features being added in AMD’s next generation high performance core and will be involved in developing testbench components, behavioral models, BFMS, monitors, checkers and coverage terms using C++/SystemVerilog. You will also be responsible to develop and execute on verification test plans at different levels of design hierarchy including unit and full-chip environments, simulate and debug directed and random stimulus and assembly level tests to find bugs in the microprocessor design and verify the functionality and conformance to the ISA.

Additional responsibilities include -

  • Work with RTL writers to resolve all simulation failures and discrepancies
  • Document test plans and testbench component plans and drive reviews with peers and partners.
  • Develop and analyze assertions and coverage terms. Participate in technical reviews of the specifications, design and test plans. Identify and address areas of concern to meet design quality objectives
  • Develop tools, infrastructure, processes and flows to enable functional verification
  • Maintain and improve existing functional verification infrastructure and methodology.
  • When presented with Silicon issues, replicate in the pre-silicon environment and provide debug expertise to root cause the issue and ensure complete validation
  • Contribute towards and drive as needed pre-silicon and/or post-silicon verification of complex architectural and microarchitectural features
  • Drive project goals and dependencies with cross-site Architects, RTL writers, and Physical Design engineers.
  • Independently develop quality, timely and cost effective solutions.

 

Preferred experience:

We are looking for people with experience in CPU level design verification. A strong background with C++, SystemVerilog, UVM, Computer Architecture and coding skills are essential.

Other skills include -

  • Strong knowledge of microprocessor pipeline and memory hierarchy
  • Hands-on work in C++ programming for either hardware modeling or testbench development or projects of similar scope and complexity
  • Logic design and representing the same in HDL (e.g. Verilog or VHDL)
  • Assembly language programming and Instruction Set Architecture of a current microprocessor
  • Hardware Verification methodology and techniques such as simulation, debug, coverage, formal, etc.
  • Experience working in a Unix/Linux environment
  • Experience in scripting languages (e.g. Perl or Python or Ruby)
  • Experience in hardware/logic simulators (e.g. VCS or NC-Verilog)
  • Experience in debug tools or waveform viewers
  • Experience in Verification languages (e.g. Specman or System Verilog)

 

Academic credentials:

  • MSEE, MSCE or related degree

 

 

*LI-AP1



Requisition Number: 78210 
Country: United States State: California City: Santa Clara 
Job Function: Design
  

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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