Principal IC Formal Verification Engineer - 106405

Location: Santa Clara, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Principal IC Formal Verification Engineer

 

THE ROLE:

 

You will work as a formal verification expert in a centralized formal verification (FV) methodology team. You are expected to explore new FV opportunities in AMD GPU core/block/unit/SoC level designs, as well as enhance existing FV solutions. It is also expected that you will do trainings on FV inside and outside the team to enable stronger FV team and more FV adoption all over AMD design/dv teams.

 

THE PERSON:

 

You are supposed to be an experienced FV engineer with deep insight on the power and limitation of different FV methods and be able to bridge the gap between FV tools and real IC FV applications.

 

KEY RESPONSIBILITIES:

 

• Review architecture specifications

• Identify key design features suitable for formal verification and decide formal application to adopt

• Develop formal verification test plans

• Work with RTL designers to create formal verification friendly reference models

• Self-manage tasks and deliverables to meet milestones

• Leverage formal verification convergence techniques to drive verification closure

 

PREFERRED EXPERIENCE

  

 • Experience in RTL design or verification for large GPU/CPU designs

• Advanced knowledge in GPU design architecture

• Experience with major formal verification tools (JasperGold, VC Formal, QuestaFormal, Hector/SLEC, etc.)

• Experience in one or more of the following domains

       1) Property checking on RTLs o Sequential equivalence checking on RTLs 

       2) Transaction level equivalence checking between C and RTL designs 

       3) Other FV applications (CC, Coverage, Register)  

       4) Proficiency with at least one scripting language (TCL/Python/Shell)

       5) Excellent communication skills and be able to work with cross-function teams to execute verification plan

 

ACADEMIC CREDENTIALS:  

 

BSEE, BS Computer Engineering or comparable and 12 + years of experience in formal verification

 

LOCATION:

 

Santa Clara, CA

 

#LI-PH1

 

 



Requisition Number: 106405 
Country: United States State: California City: Santa Clara 
Job Function: Design
  

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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