Silicon Design Engineer - 73031

Location: Santa Clara, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

This is an exciting opportunity to join AMD's USB controller team. In this position you will get the opportunity to Supervise Engineers, problem solve and improve methodologies and I/O controllers.

Responsibility:

  • Develop micro-architecture for high speed IO controller blocks based on architectural requirement.
  • Conduct design reviews of designs in technical presentations to peers and management
  • Develop RTL code for high speed IO controller blocks in Verilog HDL and make sure functional correct and reusable for different configuration.
  • Oversees Synthesis and netlist delivery that meets timing, area and power bounding box. Assist physical design team on the floor-planning and timing closure.
  • Work with Design Verification team to ensure quality for architecture definition and design implementation.

 

Requirement:

  • MS or BS  in Electrical Engineering/Computer Engineering/ Computer Science with 12+ years working experience in ASIC design industry. 
  • Strong knowledge in computer architecture and interconnects.
  • Strong experience in high speed IO controller design (e.g. USB, PCIe, SATA, Thunderbolt) . USB and/or Thunderbolt a strong plus.
  • Experience in full ASIC design cycle: requirements definition, architectural and micro-architectural specification, RTL, design verification, floor-planning, synthesis, timing closure, post-silicon validation
  • Expert on Verilog RTL design and has experience of large digital ASIC project.
  • Familiar with front-end EDA tools and flows.
  • Familiar with Unix/Linux and scripts (tcl, perl, ruby and etc.)
  • Excellent interpersonal, communication, and writing skills.  Able to provide clear and logical presentations and documentation.  Has an open mind and attitude.  Transparent.  Willing to admit and learn from mistakes.
  • Works well with others in a team environment
  • Work is performed with limited supervision. Strong sense of task scheduling and deliver on time as committed milestones. 

*LI-AP1



Requisition Number: 73031 
Country: United States State: California City: Santa Clara 
Job Function: Design 

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.


Nearest Major Market: San Jose
Nearest Secondary Market: Palo Alto

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