Physical Design Engineer

Location: Santa Clara, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

THE ROLE
The Santa Clara Circuit Technology team is looking for an experienced Physical Design Engineer with Logic/DFT exposure to drive the successful execution and completion for significant portions of our leading-edge AMD PHY Designs.
 
THE PERSON
We seek a forward looking and dependable leader who proactively identifies and resolves issues and roadblocks before they become bottlenecks or showstopper. 

 

KEY RESPONSIBILITIES

  • Bring deep knowledge on logic synthesis with experience in Physical design, and apply it to large, challenging, leading-edge SerDes designs to ensure high quality on time delivery.
  • Bring significant experience in Physical Design and team leadership and ability to coach and mentor junior team members
  • Technically support different aspects of Physical Design including writing SDC constraints and waivers, running Static Timing Analysis, and Sign Off.
  • Knowledge of running tools that perform the CDC analysis and creating constraints and waivers for the design.
  • DFT knowledge and experience is preferred
  • Experience and understanding of flow development and scripting.
  • Strong Technical problem and debugging solving.

 
PREFERRED EXPERIENCE

  • Experience in ASIC Design with relevant Physical Design Skills
  • Experience working on innovative fabrication technologies 7nm or 10nm in the PHY space
  • Working experience on CAD tools from Synopsys, Cadence and Mentor Graphics 
  • Hands on experience with Design Compiler or Fusion Compiler, PrimeTime, 0in CDC, Calibre etc.
  • Strong on scripting skills like Python/Perl/Tcl/Shell
  • Strong communication, Time Management and Presentation Skills
  • Excellent analytical and problem-solving skills along with attention to details
  • Must be a self-starter, and able to drive independently and efficiently challenging and time critical tasks to on-time completion
  • Ability to provide mentorship and guidance to junior engineers

 

ACADEMIC CREDENTIALS
Preferred:  MSEE/CE, or equivalent degree

 

LOCATION
Santa Clara, CA
 

 

#LI-MS2


Requisition Number: 125541 
Country: United States State: California City: Santa Clara 
Job Function: Design
  
 

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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