Formal Design Verification Engineer

Location: Santa Clara, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

Formal Design Verification Engineer

The Role:

In this role, you’ll have the opportunity to work on and learn about some of the industry’s cutting edge micro-architectural designs while you build, drive and execute Formal Verification plans for our next generation Zen core. Your contributions will impact products that span the global x86 market from server, to desktop and laptop designs!

The Person:

AMD is looking for an experienced and motivated Formal Verification Engineering leader who is interested in Formal Verification of our next x86 microprocessor core design.

Key Responsibilities:

  • Leading and coordinating a team of Formal Verification engineers across multiple design blocks.
  • Defining and implementing formal test plans utilizing common industry formal applications.
  • Mentoring newly experienced engineers in Formal concepts and methodologies.
  • Enabling and improving internal Formal methodology flows with industry standard Formal apps.
  • Partnering with designers to target specific logic with formal assertions and ensuring proper constraints.
  • Analyzing assertion coverage from functional regressions and closing coverage holes.
  • Assist with silicon observations often requiring proving equivalency of new bug fixes.

Key Skills:

  • Formal verification apps: property verification, coverage reachability, connectivity checking, sequential equivalency, security verification.
  • Scripting with Perl or equivalent languages.
  • Simulation and debug with a Verilog based functional simulator is a plus.
  • Solid understanding of microprocessor architecture (x86 preferred)

Preferred Experience:

  • Experience in general functional or formal verification experience with digital designs with direct formal verification experience.
  • Working experience in UNIX software environment.
  • Team leadership experience across multiple groups and geographies.

Academic Credentials:

Bachelor of Science in EE, CE, or CS preferred


Santa Clara, CA



Requisition Number: 97886 
Country: United States State: California City: Santa Clara 
Job Function: Design


AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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