Silicon Verification Infrastructure Engineer - 81432

Location: Santa Clara, California, US

Company: Advanced Micro Devices

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What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

MTS Verification Infrastructure Engineer

THE ROLE:

This is a great opportunity to develop and maintain world-class chip verification infrastructure in a fast-paced production environment on the very edge of modern technology!  The methodology infrastructure team at AMD builds the platform that automates cutting-edge chip design.  To do this we drive performance of EDA tools on AMD’s EPYC CPUs, evaluate and adopt new cloud technologies, and evolve the usability and reporting of the flow platform including application of machine learning techniques.

Note: this is NOT a junior or entry level role. Must have intermiediate to senior level professional experience (beyond coursework and internship/co-op experience).

THE PERSON:

You are a highly motivated self-starter, who is passionate about automation, solving problems, and reaching goals. You have excellent coding, communication, and interpersonal skills and collaborate well with others on your team, as well as with other business units.

KEY RESPONSIBILITIES INCLUDE:

  • Testing and deploying ASIC design build and verification flows on cloud
  • Enhancing and supporting the build and verification flows
  • Analyzing EDA tool behavior and driving improvements on EPYC server platforms

PREFERRED EXPERIENCE:

  • Deep, excellent knowledge/experience with software engineering and programming in Python and C/C++, some hands-on experience with at least some of Ruby, Perl, shell scripting
  • Good knack for finding inefficiencies in a build system and user build code. Including hardware (processor and disk) and network latency related build performance issues
  • Experience with simulation/DV environments, writing modular and portable tests using UVM, Verilog, VHDL, System Verilog, UPF, IPXACT
  • Familiarity with verification tools such as VCS, ncsim, Xcelium or Questa
  • Experience with version control software (e.g. perforce, git)
  • Knowledge on typical cloud technologies for storage, job mgmt, compute allocation, etc. will be very relevant
  • Experience with tools and methods for data preparation, classification, regression, clustering, association rules mining and visualization is a plus

ACADEMIC CREDENTIALS:

Bachelor's or Master’s degree and  intermediate to senior experience in Electrical, Computer, or Software Engineering, Computer Science, or equivalent.

Note: this is NOT a junior or entry level role. Must have intermiediate to senior level professional experience (beyond coursework and internship/co-op experience).

 

#LI-LS1



Requisition Number: 81432 
Country: United States State: California City: Santa Clara 
Job Function: Design
  

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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