80122_Subsystem DV Engineer

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

Subsystem DV Engineer

 

THE ROLE:

AMD NBIO (North Bridge IO) team delivers industry leading high-performance interconnects IP subsystem for all AMD products including dGPU, APU, Server and Game consoles, NBIO subsystem provides PCIe connectivity to external devices as well as AXI-based IPs. NBIO global team operates seamless from China, North America and Europe.

NBIO subsystem team are expanding, we are looking for a NBIO subsystem DV engineer based in Shanghai.

 

THE PERSON:

Candidate is preferred to be MSEE with minimum of 4 years, or BSEE with minimum of 6-year experience in digital ASIC/SOC design verification, fluent spoken English and good communication skill.

 

KEY RESPONSIBILITIES:

  • Develop NBIO subsystem drop and verify NBIO subsystem.
  • Global communication and alignment.

 

PREFERRED EXPERIENCE:

  • Good communication skills in both Chinese and English
  • Complex IP/ASIC/SOC design verification background, direct experience in IP/SOC or Processor (CPU or GPU) or Industry bus standard (PCI-e, HT, USB, DDR, DisplayPort)
  • Solid background with ASIC design verification flow and multiple ASIC tape out experience
  • Solid knowledge on SystemVerilog, C/C++, Verilog
  • Solid knowledge on scripting language like perl, python, ruby
  • Solid knowledge on UVM/OVM
  • Solid background with hardware verification methodologies such as coverage-based verification methodology with the use of hardware assertions (PSL or SVA)
  • Knowledge on USB or PCIE is a big plus
  • Experience in project management is a big plus

 

ACADEMIC CREDENTIALS:

  • BSEE/ MSEE

 

LOCATION:

Shanghai

 

APPLY:

Email to bella.yu@amd.com


AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV

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Requisition Number: 80122 
Country: China State: Shanghai City: Shanghai 
Job Function: 
Design  

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