80292_IP Design Engineer

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.


IP  Design Engineer



AMD NBIO (North Bridge IO) team delivers industry leading high-performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles.  NBIO global operates seamless from China, North America and Europe.

This is an exciting opportunity to join AMD’s NBIO team and work on IO-Hub IP development and deliver to all AMD’s product lines.  In this position you will get opportunity to improve your design capability by learning from global engineering communities and making significant impacts to AMD’s business.




Candidate will work as Shanghai/Beijing IOHUB IP design engineer and work with global IOHUB team on cutting edge IP development. Candidate need to have solid IP design background and outstanding global communication skill.



  • RTL design from block specification to RTL code implementation
  • Block level power and area optimization
  • Project execution and signoff
  • Short term global travel upon business need



  • Global company working experience, fluent oral English
  • Complex IP Design, direct experience in IP/SoC is preferred
  • Solid knowledge of high-speed IO knowledge (PCIe, USB) is highly preferred
  • Solid background with ASIC design flow and multiple ASIC tape out experience
  • Knowledge of low power design is required.
  • Knowledge of System Management, Security and/or IO architecture & design is an asset.
  • Must have excellent written and verbal communication skills
  • Must excel in a dynamic team working environment
  • Must be a self-starter and be able to independently drive tasks to completion



  • MSEE within 4-10 years, or BSEE within 6-12 years’ experience in digital ASIC/SOC design.






Email to bella.yu@amd.com

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV


Requisition Number: 80292 
Country: China State: Shanghai City: Shanghai 
Job Function: 

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