MTS Silicon Design Engineer

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

MTS Silicon Design Engineer -DV

THE ROLE:

SCBU SOC DV team is a global team which located in US, China and India. There are around 120 engineers in the global team to cover Integration, Functional, Security, Power, Performance and DFx verification for customer chips. (Such as PS4/PS5 and XBOX one/XBOX Series X) As a global team, SoC DV has a lot of opportunities to work with global talents from different teams. And It’s also a great chance to learn the world’s most advanced technique.

 

THE PERSON:

Someone who has DV experience with good Chinese and English communication skills should be basic qualified our requirement.

 

Responsibility:

  • Understand the design spec.
  • IP integration to SoC.
  • Develop test plan and write tests to verify datapath at SOC level
  • Work with RTL designers and others to debug the failed tests
  • Run verification related flows and fix issues
  • Complete the verification target at each milestone.


Requirement: 

  • Master with 5+ (or Bachelor with 7+) years working experience in ASIC area
  • Solid experiences with simulation model creation and the testbench build
  • Excellent knowledge of design verification methodology, such as OVM/UVM, SystemVerilog
  • Advanced programming knowledge on C/C++, perl, ruby, python, Tcl/tk, Makefile
  • Familiar with Linux Environment
  • Have hands-on experience in Chiplevel Design/Integration activities.
  • Knowledge of chip bus interfaces such as AHB and various standard peripherals & interfaces is a plus.

#LI-JG2



Requisition Number: 81075 
Country: China State: Shanghai City: Shanghai 
Job Function: 
Design  

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