MTS Silicon Design Engineer

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.


SOC Design and Verification Engineer



It is a must that the candidate has one or more of the following experience/knowledge, such as X86/ARM/8051 architecture, AMBA(AXI/AHB/APB) bus, USB(3.0/2.0/1.1; HSIC/host/device/OTG) system, NAND Flash host controller/BCH/double-data-rate interface, PCI-E/PCI bus, low power design, clock generation and control, SD/eMMC host controller, SATA/SAS, Legacy IPs (SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs (I2S/I2C/UART), Ethernet, JTAG, etc.



The candidate is expected to exhibit good verbal and written communication skills in both Chinese and English, specialized knowledge plus broad technical knowledge that facilitates integrative thinking, driving execution of quality and timely result, capability to solve complex, novel and no-recurring problems and decision-making on critical technical areas.



• Work with global SOC design team for large scale ASIC chip verification and emulation implementation.

• Focus on SOC feature verification, emulation model development, FW/SW verification, performance and power analysis etc.

• Responsible for multiple aspects in verification areas and provide technically leadership to the engineering team.

• Accountable for project delivery.



• Familiar with Unix/Linux environment and good at scripts

• Understand the architecture of the chip and functional block being designed

• Build C/C++ model for simulation

• Build test bench and monitors for DUT using UVM, SV language

• Compose test plan and validation vectors to ensure functional completeness

• Debug function/performance bugs of graphics chips


Preferred Experience:

• Familiar with emulation Environment (including Zebu and Veloce platform and tools)

• Experience with design for verification (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.)

• Should be versatile in any one of the high level verification flow such as SV,VMM,VERA,OVM etc as well as knowledge of industry standard tools for verification

• Should have excellent communication skills (both written and oral)

• Strong problem solving skills

• Understanding on Emulation model development and compile flow

• GPU or large SOC verification/validation experiences is a plus

• RTL coding with Verilog/System Verilog and familiar with C/C++ programming

• Use of Mentor’s/Synopsys’ Veloce/Zebu emulator



• Major in EE, CS or related, Master Degree or Bachelor with 6+ years working experiences



• Shanghai


AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV


Requisition Number: 85705 
Country: China State: Shanghai City: Shanghai 
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