MTS Silicon Design Engineer - Verification

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

THE ROLE:

AMD ISP team is looking for a MTS verification engineer responsible for verification deliveries for AMD future products. He/she will be a technical member in verification team and co-work with different functional teams (Architect, Algorithm, Design, Firmware, etc.) to deliver AMD ISP subsystem solutions for APU/GPU. He/She will have the opportunity to work with smart teammates to develop a chip from end to end and touch industry-advanced design verification flows, methodologies, and knowledge.

 

THE PERSON:

A quick learner for new technologies. Highly self-motivated. Excellent communication skill (both verbal and written). Key performance skills include decision making, problem solving, teamwork.

 

KEY RESPONSIBILITIES:

  • Understand the architecture, algorithm and design spec of the ISP, responsible for verification in ISP delivery for each project
  • Develop UVM test bench on both block level and IP level for test
  • Compose test plan, verification vectors, functional cover groups to ensure functional completeness
  • Work with RTL designers and algorithm teams to close all possible issues during implementation
  • Develop C++ model for simulation and image quality check
  • Participate in various DV methodologies and flows development including VC-formal, HLS, UVM-SystemC
  • Work on verification tasks on FPGA platforms and emulation platforms
  • Work with global teams(Algorithm, design, firmware, software, tuning, SOC, DFT… ) to enable ISP solutions on productions.

 

PREFERRED EXPERIENCE:

  • Hands-on experiences in ASIC design verification domain for 5+ years
  • Solid knowledge of SystemVerilog and UVM methodology
  • Good ASIC deisn knowledege for SOC/IP such as AMBA bus, DMA, embeded core 
  • C/c++ programming skills is highly preferred
  • Experience with Image Signal Processing or multi-media IPs is a big plus
  • Experience with Systemc and TLM would be strong advantage
  • Experience with PHY, embedded core, low power verification would be strong advantage
  • Experience with VC-formal would be a plus
  • Strong problem-solving skills, and attention to details
  • Good interpersonal skills (verbal and written)
  • A self-motivated team player

 

ACADEMIC CREDENTIALS:

  • MS-EE / MS-CE with 5+ years directly related experience.

 

LOCATION:

  •  Shanghai, Pudong, Zhangjiang
  • #LI-NJ1



Requisition Number: 100445 
Country/Region/Location: China State/Province: Shanghai City: Shanghai 
Job Function: 
Design  
Hiring Manager: Forest Chai 

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