PMTS Silicon Design Engineer

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

PMTS Silicon Design Engineer

 

THE ROLE:

We are currently looking for an engineering lead who will be responsible for design verification of cutting-edge GPU projects. Qualified candidate will participate in and lead Graphics Cache Sub-System function and performance verification.

AMD Graphics core is the most powerful GPU core in the world both in the 3D Gaming and High-Performance Computing domains. Cache Sub-System plays a key role in whole GPU performance. The candidate will be working with world-class talents from Cache Design Domain, GPU design Domain and SOC design Domain. 

 

THE PERSON:

We hope the candidate will be optimistic, dedicated, and hard-working.

 

KEY RESPONSIBILITIES:

  1. Micro-architect development for Graphics IP subsystem and blocks
  2. Features feasibility investigation from concept to total implementation solution
  3. Features implementation and make sure functional correct with high design quality to meet requirement for PPA and design reuse
  4. Holding periodic reviews to ensure delivery criteria
  5. Lead and co-work with verification team for functional and performance verification closure
  6. Work with cross-function implementation team in SoC flow including synthesis, timing closure, DFT, power and signoff

 

 

PREFERRED EXPERIENCE:

  1. Self-motivated and strong sense of task scheduling and deliver on time as predetermined milestones committed
  2. Hand on experience in all domains of complex SoC/ASIC design, integration, verification and methodology
  3. Experience in cache subsystem architect, design and verification of complex SoC
  4. Expert of RTL coding and implementation flow for complex SoC/ASIC project
  5. Familiar with EDA tools and C/C++ programming,  LINUX and scripts
  6. Strong knowledge of computer architecture and graphics subsystem is highly preferred
  7. Fluent English on talking, presentation and writing documents.

 

 

ACADEMIC CREDENTIALS:

  • 10+ Years Design and verification working experience with ME, EE, CS master’s degree is preferred.

 

LOCATION:

AMD Shanghai Design Center

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AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV



Requisition Number: 82000 
Country: China State: Shanghai City: Shanghai 
Job Function: 
Design  

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