SMTS Memory Tuning Engineer (8)

Location: Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

Job Title:             SMTS Memory Tuning Engineer

Job Level:        Level 8

 

Job Summary:

       You are responsible to work with global architecture, silicon design and Production team to define chip level post silicon feature enablement and validation strategy for memory IP. You are also responsible to work with project core team to develop bring up and validation plan, execute tests and debug issues. You should contribute to the development of automation environment to improve test efficiency or save human resource.

 

Key Responsibilities:

In this role, the candidate will be responsible for:

  1. Work with cross team to develop memory validation strategy, feature enablement, test plan and documentation for ASIC validation;
  2. Represents the key technology resource to a large engineering team or group;
  3. Bring up ASIC MC/PHY features and functions on post silicon;
  4. Perform memory parameters tuning and qualification tests;
  5. Compose validation reports and provide future improvement;
  6. Hands on or guide team to debug critical issues of memory domain;
  7. Develop automation tool/script for data collection and optimize test efficiency;
  8. Support AMD customers memory related issues;
  9. Provides technical mentoring and guidance to junior engineers;

 

Job Requirements:

Education& Qualifications:

  1. Bachelor or MS or PHD in Electrical Engineering, Computer Engineering or Computer Science;
  2. BS 7+ years or MS 5+ years or PhD 3+ years’ experience in ASIC or X86 hardware;
  3. Solid experience with any one of memory and controller (DDR, GDDR, HBM) on post silicon;
  4. Understand the architecture of the memory IP and functional block being designed;
  5. Good knowledge of high speed signal integrity theory and test methodology;
  6. Skillful to operate high bandwidth oscilloscope for high speed signal measuring and analyzing;
  7. Experience in script languages such as Perl, Ruby or Python is preferred;

 

Soft Skill:

  1. Highly motivated, innovative individual, good ownership and leadership;
  2. Excellent organizational ability, detail oriented and planning skills;
  3. Must have good communication & Analytical thinking skills;
  4. Excellent written and verbal communication skills in both Chinese and English;
  5. Must excel in a dynamic team working environment;

#LI-JG2



Requisition Number: 73283 
Country: China State: Shanghai City: Shanghai 
Job Function: Design 

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