SMTS Silicon Design Engineer

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

SMTS IP (GMHUB VM) DV Engineer

 

THE ROLE:

 

GMHUB IP is one of the few IPs in Shanghai site, it has three sub-teams located in Shanghai (25 people), Silicon Valley (10 people) and Toronto (25 people).

The hiring role is IP DV focusing on VM (Virtual Memory, be responsible for pagetable address translation which is a very important block for whole chip), co-work with engineers in Silicon Valley and Toronto.

The opportunity of working on world-leading IP is very precious, hope you can join us and win the success together.

 

 

KEY RESPONSIBILITIES:

 

In this key role, the candidate will be responsible for design verification of GMHUB IP:

  1. Development of infrastructure and testbench components for GMHUB IP verification.
  2. GMHUB features test plan established and implemented, including new tests written, debugging and sync with designers etc.
  3. Support the deployment the GMHUB IP into variant SoCs.
  4. SOC design-verification, co-work with SOC team and other IP teams for SOC level test’s debugging.

 

 

PREFERRED EXPERIENCE:

 

  1. BS, MS or PhD in Electrical Engineering or Computer Science.
  2. Have good understanding of Pre-Silicon design process from Architecture, Design, Synthesis and Gate level Implementation till Tapeout release
  3. Good programming knowledge on Verilog/SystemVerilog, C/C++
  4. Familiar with common design verification methodology.
  5. Knowledge on Perforce, SVA, SV, UVM, script programming etc.
  6. Should have good communication skills (both written and oral) and should be able to participate cross functional engineering teams geographically.
  7. Positive attitude and good team player

 

 

LOCATION:

Shanghai

#LI-NJ1

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV



Requisition Number: 79806 
Country: China State: Shanghai City: Shanghai 
Job Function: 
Design  

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