DACC DV Engineer

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

 

 

What you do at AMD changes everything

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, Immersive platforms, and the data center.

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to look at the opportunities available to come join our team.
 

Verification lead of DACC Subsystem

THE ROLE:

AMD NBIO DACC (Data Accelerator) team delivers industry leading high-performance DMA engine for AMD Data Center CPU and GPU. DACC is HW implementation of a new DMA engine technology co-developed with AMD’s ecosystem partners incorporating virtualization and shared virtual memory capabilities, as well as incorporating additional accelerations functions (CRC, Crypto etc).  DACC is a critical ingredient of AMD’s I/O accelerator technology to service today’s Mega Data Center ever increasing computing demand. You will work with world class global team on DACC development and verification, provide technical support to various global SOC teams.

 

THE PERSON:

As DACC subsystem verification lead, responsible for participating on verification strategy definition, verification environment setup, test plan creation, lead verification execution and verification quality sign off

 

 

KEY RESPONSIBILITIES:

 

  • Work with architects on verification strategy setup
  • Lead several team members to sign off DACC IP regression/coverage to make product time to market on time
  • Collaborate with global team on implementation of multiple function domains like Firmware, Formal, Power, Performance verification
  • Build re-usable components and infrastructure that can be re-used for upper-level verification env such as SOC
  • Be involved technically system features discussion and share productive ideas from System level perspective for DACC verification strategy
  • Create DACC Subsystem level test plan
  • Develop test sequence for DACC features
  • DACC DV/Deployment flow implementation
  • Coaches and mentor junior staff

 

PREFERRED EXPERIENCE:

 

  • Complex IP/ASIC/SOC design verification, direct experience in IP/SOC or Processor (CPU or GPU) or Industry bus standard (PCIe, USB, DDR, DisplayPort)
  • Solid background with ASIC design verification flow and multiple ASIC tape-out experience
  • Solid knowledge on System Verilog, C/C++, Verilog
  • Solid knowledge on scripting language like Perl, python, ruby
  • Solid knowledge on UVM/OVM
  • Experience on leading people to complete the whole verification flow
  • Solid background with hardware verification methodologies such as coverage-based verification methodology with the use of hardware assertions (PSL or SVA)
  • Knowledge on High-speed IO/PCIE is a big plus
  • Knowledge on IO Virtualization is big plus
  • Fluent verbal English for technical discussion with global team

 

ACADEMIC CREDENTIALS:

Candidate is preferred to be MSEE with minimum of 5 years, or BSEE with minimum of 7-year experience in digital ASIC/SOC design verification.

 

LOCATION:

Shanghai

 

APPLY:

Email to vicky.cai@amd.com


AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV

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Requisition Number: 176728 
Country/Region/Location: China State/Province: Shanghai City: Shanghai 
Job Function: 
Design  

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