SMTS Silicon Design Engineer

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

 

What you do at AMD changes everything

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, Immersive platforms, and the data center.

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

JOB TITLE SMTS

 

THE ROLE:

PCIe SubSystem team delivers industry leading high-performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles. PCIe IP is one of the most important IP in all AMD’s projects. Shanghai PCIe team contributed a lot on the first PCIe Gen4 product and are working on Gen5 product. So, this role provides a great opportunity for working on the most advanced PCIe technology with the global team Architects/Designers/DV on PCIe SS IP Verification.

 

THE PERSON:

People who have the passion to work on leading edge technology, who have good communication skills will be preferred in this role.

 

KEY RESPONSIBILITIES:

  • Develop and update infrastructure and environment for IP level design verification.
  • Closely working with Design and Architecture team to develop new verification component
  • Responsible for PCIe SS IP new features verification plan and verification closure

 

PREFERRED EXPERIENCE:

  • Solid background with ASIC design verification flow and multiple ASIC tape out experience with 6~10+ years
  • Team leading experience and experienced on testbench architecture.
  • Solid knowledge on UVM, SystemVerilog , Verilog is a must
  • SoC system or sub-system work experience is a plus
  • Fluent written English for technical discussion among global team, vocal is a plus
  • Knowledge on High speed IO/PCIE or Serdes PHY is a big plus
  • Knowledge on C++ or script language like perl, python, ruby is a plus

 

ACADEMIC CREDENTIALS:

  • Solid education background, 211 master is must, 985 preferred. Or Top 100 ranking oversea
  • Candidate is preferred to be MSEE with 6~10+ years, or BSEE with minimum of 8-years’ experience in digital ASIC/SOC design verification.

 

LOCATION:

Shanghai

 

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Requisition Number: 178201 
Country/Region/Location: China State/Province: Shanghai City: Shanghai 
Job Function: 
Design  

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